Vahid Majidzadeh

According to our database, Vahid Majidzadeh authored at least 10 papers between 2006 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

A 16-channel, 359 μW, parallel neural recording system using Walsh-Hadamard coding.

Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

An 8-PPM, 45 pJ/bit UWB transmitter with reduced number of PA elements.

Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici, Jan M. Rabaey

Proceedings of the Symposium on VLSI Circuits, 2012

2011

Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor.

Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici

IEEE Trans. Biomed. Circuits Syst., 2011

2010

A (256×256) pixel 76.7mW CMOS imager/ compressor based on real-time In-pixel compressive sensing.

Vahid Majidzadeh, Laurent Jacques, Alexandre Schmid, Pierre Vandergheynst, Yusuf Leblebici

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

CMOS compressed imaging by Random Convolution.

Laurent Jacques, Pierre Vandergheynst, Alexandre Bibet, Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici

Proceedings of the IEEE International Conference on Acoustics, 2009

A fully on-chip LDO voltage regulator for remotely powered cortical implants.

Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici

Proceedings of the 35th European Solid-State Circuits Conference, 2009

A micropower neural recording amplifier with improved noise efficiency factor.

Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2006

A Reduced-Sample-Rate Sigma-Delta-Pipeline ADC Architecture for High-Speed High-Resolution Applications.

Vahid Majidzadeh, Omid Shoaei

IEICE Trans. Electron., 2006

A power optimized design methodology for low-distortion sigma-delta-pipeline ADCs.

Vahid Majidzadeh, Omid Shoaei

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Arbitrary design of high order noise transfer function for a novel class of reduced-sample-rate sigma-delta-pipeline ADCs.

Vahid Majidzadeh, Omid Shoaei

Proceedings of the Conference on Design, Automation and Test in Europe, 2006