Vadim Geurkov

Orcid: 0000-0002-4264-4117

According to our database1, Vadim Geurkov authored at least 12 papers between 2004 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
On the Theory and Design of Polynomial Division Circuits.
IEEE Trans. Emerg. Top. Comput., 2020

A Unified Method of Designing Signature Analyzers for Digital and Mixed-Signal Circuits Testing.
Proceedings of the IEEE International Test Conference, 2020

2016
Signature and Residue Testing of Microprogrammable Control Units.
IEEE Access, 2016

2014
On the Use of an Algebraic Signature Analyzer for Mixed-Signal Systems Testing.
VLSI Design, 2014

Designing of an algebraic signature analyzer for mixed-signal systems.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Design of a 4-bit programmable delay with TDC-based BIST for use in serial data links.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2012
Optimal choice of arithmetic compactors for mixed-signal systems.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

2008
Macro-programmable reconfigurable stream processor for collaborative manufacturing systems.
J. Intell. Manuf., 2008

Testing Digital Systems by Error-locating Codes.
Proceedings of the 2008 International Conference on Embedded Systems & Applications, 2008

A multi-mode video-stream processor with cyclically reconfigurable architecture.
Proceedings of the 5th Conference on Computing Frontiers, 2008

2007
Dynamic behavior of resistive faults in nanometer technology.
Microelectron. Reliab., 2007

2004
Re-Configurable Parallel Stream Processor with Self-Assembling and Self-Restorable Micro-Architecture.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004


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