V. Chandramouli

According to our database1, V. Chandramouli authored at least 9 papers between 1990 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1999
Including inductive effects in interconnect timing analysis.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
Delay modeling for functional timing analysis.
PhD thesis, 1998

AFTA: A Formal Delay Model for Functional Timing Analysis.
Proceedings of the 1998 Design, 1998

1997
Signal Delay in Coupled, Distributed RC Lines in the Presence of Temporal Proximity.
Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997

1996
Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier.
IEEE Trans. Very Large Scale Integr. Syst., 1996

Modeling the Effects of Temporal Proximity of Input Transitions on Gate Propagation Delay and Transition Time.
Proceedings of the 33st Conference on Design Automation, 1996

1995
A new, precharged, low-power logic family for GaAs circuits.
IEEE J. Solid State Circuits, February, 1995

1993
An Integrated Technology CAD System for Process and Device Designers.
Proceedings of the Sixth International Conference on VLSI Design, 1993

1990
Bridging faults and their implication to PLAs.
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990


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