Uwe Sparmann

According to our database, Uwe Sparmann authored at least 19 papers between 1988 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1999

Universal delay test sets for logic networks.

Uwe Sparmann, Holger Müller, Sudhakar M. Reddy

IEEE Trans. Very Large Scale Integr. Syst., 1999

1998

Improving Path Delay Fault Testability by Path Removal.

Uwe Sparmann, Lars Köller

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

1996

On the effectiveness of residue code checking for parallel two's complement multipliers.

Uwe Sparmann, Sudhakar M. Reddy

IEEE Trans. Very Large Scale Integr. Syst., 1996

On minimizing the number of test points needed to achieve complete robust path delay fault testability.

Prasanti Uppaluri, Uwe Sparmann, Irith Pomeranz

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Local Transformations and Robust Dependent Path Delay.

Harry Hengster, Uwe Sparmann, Bernd Becker, Sudhakar M. Reddy

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Minimal Delay Test Sets for Unate Gate Networks.

Uwe Sparmann, Holger Müller, Sudhakar M. Reddy

Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

1995

On the testability of iterative logic arrays.

Bernd Becker, Ralf Hahn, Joachim Hartmann, Uwe Sparmann

Integr., 1995

Fast Identification of Robust Dependent Path Delay Faults.

Uwe Sparmann, D. Luxenburger, Kwang-Ting Cheng, Sudhakar M. Reddy

Proceedings of the 32st Conference on Design Automation, 1995

1994

Two-Layer Wiring with Pin Preassignments is Easier if the Power Supply Nets are Already Generated.

Paul Molitor, Uwe Sparmann, Dorothea Wagner

Proceedings of the Seventh International Conference on VLSI Design, 1994

A Hierarchical Environment for Interactive Test Engineering.

Thomas Burch, Joachim Hartmann, Günter Hotz, M. Krallmann, U. Nikolaus, Sudhakar M. Reddy, Uwe Sparmann

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

On the check base selection problem for fast adders.

Uwe Sparmann

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

1992

Derivation of High Quality Tests for Large Heterogeneous Circuits: Floating-Point Operations.

Uwe Sparmann

Proceedings of the Informatik, Festschrift zum 60. Geburtstag von Günter Hotz, 1992

1991

Strukturbasierte Testmethoden für arithmetische Schaltkreise.

Uwe Sparmann

PhD thesis, 1991

Computations over Finite Monoids and their Test Complexity.

Bernd Becker, Uwe Sparmann

Theor. Comput. Sci., 1991

A uniform test approach for RCC-adders.

Bernd Becker, Uwe Sparmann

Fundam. Informaticae, 1991

Structure based methods for parallel pattern fault simulation in combinational circuits.

Bernd Becker, Ralf Hahn, Rolf Krieger, Uwe Sparmann

Proceedings of the conference on European design automation, 1991

1990

A graphical system for hierarchical specifications and checkups of VLSI circuits.

Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann

Proceedings of the European Design Automation Conference, 1990

1988

Design and Test of a Pattern Matching Circuit.

Uwe Sparmann

J. Inf. Process. Cybern., 1988

Regular Structures and Testing: RCC-Adders.

Bernd Becker, Uwe Sparmann

Proceedings of the VLSI Algorithms and Architectures, 3rd Aegean Workshop on Computing, 1988