Umesh Ghanekar

According to our database, Umesh Ghanekar authored at least 18 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

An Efficient Design of Scalable Reversible Multiplier with Testability.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

J. Circuits Syst. Comput., 2022

A new double backward distributive weighted adaptive filtering approach for speech quality improvement.

V. Srinivasarao, Umesh Ghanekar

Int. J. Speech Technol., 2022

2021

Notes on Problem Formulation in Machine Learning.

Razvan Amironesei, Emily Denton, Umesh Ghanekar

IEEE Technol. Soc. Mag., 2021

Testable Designs of Toffoli Fredkin Reversible Circuits.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

CoRR, 2021

2020

Classification of priors and regularization techniques appurtenant to single image super-resolution.

Garima Pandey, Umesh Ghanekar

Vis. Comput., 2020

Speech intelligibility enhancement: a hybrid wiener approach.

V. Srinivasarao, Umesh Ghanekar

Int. J. Speech Technol., 2020

A novel double pole transfer function-single frequency filtering approach for speech enhancement.

V. Srinivasarao, Umesh Ghanekar

Trans. Emerg. Telecommun. Technol., 2020

Speech enhancement - an enhanced principal component analysis (EPCA) filter approach.

V. Srinivasarao, Umesh Ghanekar

Comput. Electr. Eng., 2020

2019

Design and Implementation of QCA D-Flip-Flops and RAM Cell Using Majority Gates.

Trailokya Nath Sasamal, Ashutosh Kumar Singh, Umesh Ghanekar

J. Circuits Syst. Comput., 2019

Fault detection in multiple controlled Fredkin circuits.

Ashutosh Kumar Singh, Hari Mohan Gaur, Umesh Ghanekar

IET Circuits Devices Syst., 2019

Design of Reversible Arithmetic Logic Unit with Built-In Testability.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

IEEE Des. Test, 2019

2018

Image steganography based on Canny edge detection, dilation operator and hybrid coding.

Kumar Gaurav, Umesh Ghanekar

J. Inf. Secur. Appl., 2018

Offline Testing of Reversible Logic Circuits: An Analysis.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

Integr., 2018

Efficient design of coplanar ripple carry adder in QCA.

Trailokya Nath Sasamal, Ashutosh Kumar Singh, Umesh Ghanekar

IET Circuits Devices Syst., 2018

Testable Design of Reversible Circuits Using Parity Preserving Gates.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

IEEE Des. Test, 2018

2010

A Contrast Enhancement-Based Filter for Removal of Random Valued Impulse Noise.

Umesh Ghanekar, Awadhesh Kumar Singh, Rajoo Pandey

IEEE Signal Process. Lett., 2010

Impulse Noise Removal from Color Images Using Adaptive Neuro-fuzzy Impulse Detector.

Umesh Ghanekar, Awadhesh Kumar Singh, Rajoo Pandey

Proceedings of the Contemporary Computing - Third International Conference, 2010

2005

Specifying Mobile Network using a wp-like Formal Approach.

Awadhesh Kumar Singh, Umesh Ghanekar, Anup Kumar Bandyopadhyay

Rev. Colomb. de Computación, 2005