Uma Sharma
Orcid: 0000-0001-6156-0552
According to our database1,
Uma Sharma
authored at least 12 papers
between 2017 and 2024.
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Bibliography
2024
A Novel and Voltage Resilient Design of Ultra-High-Speed Low Power Keeper Based Full Adder.
Circuits Syst. Signal Process., December, 2024
Body Bias Impact on ION Degradation in SiGe-Channel pMOS without Si-Cap for DRAM Periphery.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2023
Circuits Syst. Signal Process., May, 2023
Exploring Low-Power Implementation Techniques for 2:1 MUX Using Conventional and CNTFET Technology: a Performance Comparison.
Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023
Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023
2022
Circuits Syst. Signal Process., 2022
2021
Stochastic and Deterministic Modeling Frameworks for Time Kinetics of Gate Insulator Traps During and After Hot Carrier Stress in MOSFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
2020
BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor Activity.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2019
On the Frequency Dependence of Bulk Trap Generation During AC Stress in Si and SiGe RMG P-FinFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
2017
Int. J. Multim. Data Eng. Manag., 2017