Ulrich Ramacher

According to our database, Ulrich Ramacher authored at least 34 papers between 1989 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Architecture and implementation of a Software-Defined Radio baseband processor.

Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Dominik Langen, Jörg Berthold, R. Kramer, A. Schackow, Cyprian Grassmann, Mirko Sauermann, P. Szreder, F. Capar, G. Obradovic, W. Xu, Nico Brüls, Kang Lee, Eugene Weber, Ray Kuhn, John Harrington

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2007

Roundtable: Envisioning the Future for Multiprocessor SoC.

Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne H. Wolf

IEEE Des. Test Comput., 2007

Software-Defined Radio Prospects for Multistandard Mobile Phones.

Ulrich Ramacher

Computer, 2007

Challenges and prospects of SDR for mobile phones.

Ulrich Ramacher

Proceedings of the 25th International Conference on Computer Design, 2007

2005

Image Segmentation by Networks of Spiking Neurons.

Joachim M. Buhmann, Tilman Lange, Ulrich Ramacher

Neural Comput., 2005

3D Chip Stack Technology Using Through-Chip Interconnects.

Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher

IEEE Des. Test Comput., 2005

Automatic speech recognition with neural spike trains.

Marcus Holmberg, David Gelbart, Ulrich Ramacher, Werner Hemmert

Proceedings of the 9th European Conference on Speech Communication and Technology, 2005

Temporal Sound Processing by Cochlear Nucleus Octopus Neurons.

Werner Hemmert, Marcus Holmberg, Ulrich Ramacher

Proceedings of the Artificial Neural Networks: Biological Inspirations, 2005

Embedded vision platform for video surveillance systems.

Axel Techmer, Hans-Martin Blüthgen, Cyprian Grassmann, J. A. Ulrich Hachmann, Wolfgang Raab, Ulrich Ramacher

Proceedings of the Electronic Imaging: Image and Video Communications and Processing 2005, 2005

Wireless platforms: GOPS for cents and MilliWatts.

Francine Bacchini, Jan M. Rabaey, Allan Cox, Frank Lane, Rudy Lauwereins, Ulrich Ramacher, David Witt

Proceedings of the 42nd Design Automation Conference, 2005

2004

A low-power memory hierarchy for a fully programmable baseband processor.

Wolfgang Raab, Hans-Martin Blüthgen, Ulrich Ramacher

Proceedings of the 3rd Workshop on Memory Performance Issues, 2004

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny

Proceedings of the Image Processing: Algorithms and Systems III, 2004

Pulse coupled neural networks with adaptive synapses for image segmentation.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny

Proceedings of the ARCS 2004, 2004

2003

100 GOPS vision processor for automotive applications.

Ulrich Ramacher, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Wolfgang Raab, Axel Techmer

SIGARCH Comput. Archit. News, 2003

A 100-GOPS Programmable Processor for Vehicle Vision Systems.

Wolfgang Raab, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Ulrich Ramacher, Christian Sauer, Axel Techmer

IEEE Des. Test Comput., 2003

Correlation-based feature detection using pulsed neural networks.

Arne Heittmann, Ulrich Ramacher

Proceedings of the NNSP 2003, 2003

A programmable platform for software-defined radio.

Hans-Martin Blüthgen, Cyprian Grassmann, Wolfgang Raab, Ulrich Ramacher

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

2002

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny

Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing, 2002

Application Specific Embedded Processors for Next Generation Communication Systems.

Ulrich Ramacher

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights.

Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny

Proceedings of the Artificial Neural Networks, 2002

2001

Crosstalk noise in future digital CMOS circuits.

Chr. Werner, Ralf Goettsche, A. Wörner, Ulrich Ramacher

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

1999

Prototyp eines Bildrechners für Echtzeitbildverarbeitung in Industrie- und Medientechnik.

Ulrich Ramacher, Wolfgang Raab, Wolfgang Kabatzke

Proceedings of the PEARL 99: Multimedia und Automatisierung, 1999

1996

SEE-1 - A Vision System for Use in Real World Environments.

Ulrich Ramacher

Proceedings of the Artificial Neural Networks, 1996

1995

SYNAPSE-1: a high-speed general purpose parallel neurocomputer system.

Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Joachim Gläß, Andreas Wurz, Reinhard Männer

Proceedings of IPPS '95, 1995

1993

A general-purpose signal processor architecture for neurocomputing and preprocessing applications.

Ulrich Ramacher, Jörg Beichter, Nico Brüls

J. VLSI Signal Process., 1993

Hamiltonian dynamics of neural networks.

Ulrich Ramacher

Neural Networks, 1993

Design of a general-purpose neural signal processor.

Jörg Beichter, Nico Brüls, Elisabeth Sicheneder, Ulrich Ramacher, Heinrich Klar

Neurocomputing, 1993

Recent Developments In Neurodynamics And Their Impact On The Design Of Neuro-Chips.

Ulrich Ramacher, Peter Schildberg

Int. J. Neural Syst., 1993

Multiprocessor And Memory Architecture Of The Neurocomputer Synapse-1.

Ulrich Ramacher, Wolfgang Raab, Joachim K. Anlauf, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Reinhard Männer, Joachim Gläß, Andreas Wurz

Int. J. Neural Syst., 1993

Architecture and VLSI Design of a VLSI Neural Signal Processor.

Ulrich Ramacher, Jörg Beichter, Nico Brüls, Elisabeth Sicheneder

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992

SYNAPSE - A Neurocomputer that Synthesizes Neural Algorithms on a Parallel Systolic Engine.

Ulrich Ramacher

J. Parallel Distributed Comput., 1992

Mikroelektronische Realisierung von künstlichen neuronalen Netzen / Microelectronic Realizations of artificial neural networks.

Karl Goser, Ulrich Ramacher

it Inf. Technol., 1992

1990

Fine-grain system architectures for systolic emulation of neural algorithms.

Ulrich Ramacher, Wolfgang Raab

Proceedings of the Application Specific Array Processors, 1990

1989

Evaluation and Comparison of Selected WSI Reconfiguration Architectures in Terms of Yield and Yield per Area.

Matthias Wesseling, Ulrich Ramacher, Karl Goser

Proceedings of the Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems, 1989