Ulrich Jagdhold
According to our database1,
Ulrich Jagdhold
authored at least 8 papers
between 2001 and 2010.
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Bibliography
2010
An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
2009
HDL-Synthese und Simulation von Hochgeschwindigkeits-Digitalschaltungen mit gemischten CMOS- und ECL-Bibliotheken.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
2007
Efficient Inner Receiver Design for OFDM-Based WLAN Systems: Algorithm and Architecture.
IEEE Trans. Wirel. Commun., 2007
2004
A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM.
IEEE J. Solid State Circuits, 2004
A CORDIC like processor for computation of arctangent and absolute magnitude of a vector.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
2001
IEEE Wirel. Commun., 2001