Ulrich Hirnschrott

According to our database, Ulrich Hirnschrott authored at least 6 papers between 2003 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

xDSPcore: A Compiler-Based Configurable Digital Signal Processor.

Andreas Krall, Ivan Pryanishnikov, Ulrich Hirnschrott, Christian Panis

IEEE Micro, 2004

DSPxPlore: design space exploration methodology for an embedded DSP core.

Christian Panis, Ulrich Hirnschrott, Gunther Laure, Wolfgang Lazian, Jari Nurmi

Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004

FSEL - Selective Predicated Execution for a Configurable DSP Core.

Christian Panis, Ulrich Hirnschrott, Andreas Krall, Gunther Laure, Wolfgang Lazian, Jari Nurmi

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

A scalable embedded DSP core for SoC applications.

Christian Panis, Ulrich Hirnschrott, Stefan Farfeleder, Andreas Krall, Gunther Laure, Wolfgang Lazian, Jari Nurmi

Proceedings of the 2004 International Symposium on System-on-Chip, 2004

2003

Graph Coloring vs. Optimal Register Allocation for Optimizing Compilers.

Ulrich Hirnschrott, Andreas Krall, Bernhard Scholz

Proceedings of the Modular Programming Languages, Joint Modular Languages Conference, 2003

VLIW operation refinement for reducing energy consumption.

Ulrich Hirnschrott, Andreas Krall

Proceedings of the 2003 International Symposium on System-on-Chip, 2003