Ulrich Baur

According to our database¹, Ulrich Baur authored at least 4 papers between 1997 and 1998.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

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1998

Delay test of chip I/Os using LSSD boundary scan.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

1997

Standard-cell-based design methodology for high-performance support chips.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 1997

Testing the Enterprise IBM System/390<sup>TM</sup> Multi Processor.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Ulrich Baur

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