Udaya Suriyan V

According to our database, Udaya Suriyan V authored at least 1 paper in 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2024

Design and Analysis of 4 Bit Multipliers Using Pass Transistor Logic and Gate Diffusion Input Technique Using 18nm FinFET Technology.

Pavithara P, Ramesh M, Prabu M, Kavin Kumar K, Ponmurugan P, Udaya Suriyan V

Proceedings of the 7th International Conference on Devices, Circuits and Systems, 2024