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Tze-Chiang Chen

According to our database1, Tze-Chiang Chen authored at least 4 papers between 1989 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1999, "For contributions to silicon bipolar and DRAM technology development.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Challenges for silicon technology scaling in the Nanoscale Era.
[BibTeX]
[DOI]
Tze-Chiang Chen
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
Message from the Vice President, Science and Technology, IBM Research Division.
[BibTeX]
[DOI]
Tze-Chiang Chen
IBM J. Res. Dev., 2008

2006
Where CMOS is going: trendy hype vs. real technology.
[BibTeX]
[DOI]
Tze-Chiang Chen
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

1989
A 23-ps/2.1-mW ECL gate with an AC-coupled active pull-down emitter-follower stage.
[BibTeX]
[DOI]
Kai-Yap Toh
,
Ching-Te Chuang
,
Tze-Chiang Chen
,
James D. Warnock
IEEE J. Solid State Circuits, October, 1989


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