Tzachi Noy
Orcid: 0000-0002-4922-5564
According to our database1,
Tzachi Noy
authored at least 6 papers
between 2020 and 2023.
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Bibliography
2023
Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach.
IEEE Access, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
IEEE Trans. Circuits Syst., 2020
Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
WavePro: Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020