Tyler L. Brandon
According to our database1,
Tyler L. Brandon
authored at least 13 papers
between 2001 and 2012.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
2010
Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2009
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
2008
Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Integr., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder.
IEEE J. Solid State Circuits, 2007
2006
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2001
Proceedings of the 9th IEEE International Workshop on Memory Technology, 2001