Tushar Gheewala

According to our database, Tushar Gheewala authored at least 6 papers between 1991 and 1996.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1996

A Unifying Methodology for Intellectual Property and Custom Logic Testing.

Sandeep Bhatia, Tushar Gheewala, Prab Varma

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1994

The economics of scan-path design for testability.

Prab Varma, Tushar Gheewala

J. Electron. Test., 1994

1993

Delay Testing Using a Matrix of Accessible Storage.

Prab Varma, Tushar Gheewala

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991

Use of CrossCheck test technology in practical applications.

Susheel J. Chandra, Tushar Gheewala, Hector R. Sucar, George Swan

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991

For Test Automation, Silicon is Free.

Tushar Gheewala

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

ATPG Based on a Novel Grid-Addressable Latch Element.

Susheel J. Chandra, Tom Ferry, Tushar Gheewala, Kerry Pierce

Proceedings of the 28th Design Automation Conference, 1991