Tun Zainal Azni Zulkifli
Orcid: 0000-0002-8157-4000
According to our database1,
Tun Zainal Azni Zulkifli
authored at least 9 papers
between 2006 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
Ultra-low-voltage integrable electronic implementation of delayed inertial neural networks for complex dynamical behavior using multiple activation functions.
Neural Comput. Appl., 2020
Carbon Nanotube and Resistive Random Access Memory Based Unbalanced Ternary Logic Gates and Basic Arithmetic Circuits.
IEEE Access, 2020
2019
Low-Voltage Low-Power Integrable CMOS Circuit Implementation of Integer- and Fractional-Order FitzHugh-Nagumo Neuron Model.
IEEE Trans. Neural Networks Learn. Syst., 2019
2017
2014
IEICE Electron. Express, 2014
2010
A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18µm CMOS technology.
IEICE Electron. Express, 2010
A general on-wafer noise figure de-embedding technique with gain uncertainty analysis.
IEICE Electron. Express, 2010
2008
A 10-Gb/s fully balanced differential output transimpedance amplifier in 0.18-μm CMOS technology for SDH/SONET application.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006