Tuan D. A. Nguyen

According to our database, Tuan D. A. Nguyen authored at least 17 papers between 2011 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Power-Aware Runtime Scheduler for Mixed-Criticality Systems on Multicore Platform.

Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators.

Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar

IEEE Embed. Syst. Lett., 2021

2020

Power-Aware Run-Time Scheduler for Mixed-Criticality Systems on Multi-Core Platform.

Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar

CoRR, 2020

Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment.

Tuan D. A. Nguyen, Akash Kumar

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019

Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems.

Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar

Integr., 2019

Online Peak Power and Maximum Temperature Management in Multi-core Mixed-Criticality Embedded Systems.

Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

High-Throughput BitPacking Compression.

Nusrat Jahan Lisa, Tuan Duy Anh Nguyen, Dirk Habich, Akash Kumar, Wolfgang Lehner

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Column Scan Acceleration in Hybrid CPU-FPGA Systems.

Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan D. A. Nguyen, Akash Kumar

Proceedings of the International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, 2018

QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning.

Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar

Proceedings of the International Conference on Field-Programmable Technology, 2018

Column Scan Optimization by Increasing Intra-Instruction Parallelism.

Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Tuan D. A. Nguyen, Akash Kumar, Wolfgang Lehner

Proceedings of the 7th International Conference on Data Science, 2018

FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan.

Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan Duy Anh Nguyen, Akash Kumar

Proceedings of the Data Management Technologies and Applications, 2018

Lifetime-aware design methodology for dynamic partially reconfigurable systems.

Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2016

XNoC: A non-intrusive TDM circuit-switched Network-on-Chip.

Tuan D. A. Nguyen, Akash Kumar

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

PRFloor: An Automatic Floorplanner for Partially Reconfigurable FPGA Systems.

Tuan D. A. Nguyen, Akash Kumar

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015

An automated technique to generate relocatable partial bitstreams for Xilinx FPGAs.

Roel Oomen, Tuan D. A. Nguyen, Akash Kumar, Henk Corporaal

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014

PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems.

Tuan D. A. Nguyen, Akash Kumar

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2011

BBFEX: a bloom-bloomier filter extension for long patterns in FPGA-based pattern matching system (abstract only).

Trung Hieu Bui, Tuan Duy Anh Nguyen, Ngoc Thinh Tran

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011