Tsuyoshi Fujinaga

According to our database1, Tsuyoshi Fujinaga authored at least 5 papers between 2009 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
VLSI Architecture of GMM Processing and Viterbi Decoder for 60, 000-Word Real-Time Continuous Speech Recognition.
IEICE Trans. Electron., 2011

A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition.
IEICE Trans. Electron., 2011

A 40 nm 144 mW VLSI processor for realtime 60 kWord continuous speech recognition.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system.
Proceedings of the 10th Annual Conference of the International Speech Communication Association, 2009


  Loading...