Tsutomu Sekibe

According to our database, Tsutomu Sekibe authored at least 4 papers between 1989 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Implementation of a RISC-V SMT Core in an AI processor.

Hidetaro Tanaka, Tomoaki Tanaka, Ryosuke Higashi, Tsutomu Sekibe, Shuichi Takada, Hironori Nakajo

Proceedings of the 11th International Symposium on Information and Communication Technology, 2022

2012

Cross-Layer adaptive power save control method for wireless local area networks.

Hirokazu Kobayashi, Masaaki Harada, Satoshi Senga, Kazushige Yamada, Junichro Soeda, Tsutomu Sekibe

Proceedings of the 8th IEEE International Conference on Wireless and Mobile Computing, 2012

2009

A 45nm single-chip application-and-baseband processor using an intermittent operation technique.

Motoyasu Shirasaki, Yusaku Miyazaki, Masahiro Hoshaku, Hiroo Yamamoto, Sachio Ogawa, Takuya Arimura, Hiroshi Hirai, Yasuo Iizuka, Tsutomu Sekibe, Yoichi Nishida, Toshiyuki Ishioka, Junji Michiyama

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

1989

Highly parallel residue arithmetic chip based on multiple-valued bidirectional current-mode logic.

Michitaka Kameyama, Tsutomu Sekibe, Tatsuo Higuchi

IEEE J. Solid State Circuits, October, 1989