Tsutomu Ishida

According to our database1, Tsutomu Ishida authored at least 4 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Deep Learning-Based Wafer-Map Failure Pattern Recognition Framework.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

2014
A volume diagnosis method for identifying systematic faults in lower-yield wafer occurring during mass production.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2012
Speed-path analysis for multi-path failed latches with random variation.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011
Hardware Implementation of Prearranged Tables Based Modular Inversion.
Proceedings of the 2011 International Conference on Broadband, 2011


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