Tsutomu Hoshino

According to our database1, Tsutomu Hoshino authored at least 22 papers between 1983 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2001
A Music Synthesizer on FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2001

A Cellular Automata System with FPGA.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
A Co-processor System with a Virtex FPGA for Evolutionary Computation.
Proceedings of the Field-Programmable Logic and Applications, 2000

High Speed Computation of Lattice gas Automata with FPFA.
Proceedings of the Field-Programmable Logic and Applications, 2000

A C to HDL Compiler for Pipeline Processing on FPGAs.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Shogi Processor with a Field Programmable Gate Array.
Proceedings of the Computers and Games, Second International Conference, 2000

1999
Hardware Implementation Techniques for Recursive Calls and Loops.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

A Reconfigurable Architecture for High Speed Computation by Pipeline Processing.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

High Speed Hardware Computation of Co-evolution Models.
Proceedings of the Advances in Artificial Life, 5th European Conference, 1999

An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller.
Proceedings of the Sixteenth National Conference on Artificial Intelligence and Eleventh Conference on Innovative Applications of Artificial Intelligence, 1999

1998
Fractal Fitness Landscape and Loss of Robustness in Evolutionary Robot Navigation.
Auton. Robots, 1998

A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.
Proceedings of the Evolvable Systems: From Biology to Hardware, 1998

A Field-Programmable Gate-Array System for Evolutionary Computation.
Proceedings of the Field-Programmable Logic and Applications, 1998

1996
Variable Length Chromosome GA for Evolvable Hardware.
Proceedings of 1996 IEEE International Conference on Evolutionary Computation, 1996

1994
Egrets of a Feather Flock Together.
Artif. Life, 1994

1988
Mapping schemes of the particle-in-cell method implemented on the PAX computer.
Parallel Comput., 1988

1987
Mesh-connected parallel computer PAX for scientific applications.
Parallel Comput., 1987

1986
An Invitation to the World of PAX.
Computer, 1986

1985
Parallelized ADI Scheme Using GECR (Gauss-Elimination-Cyclic-Reduction) Method and Implementation of Navier-Stokes Equation in the PAX computer.
Proceedings of the International Conference on Parallel Processing, 1985

1984
Super Freedom Simulator PAX.
Proceedings of the VLSI Engineering: Beyond Software Engineering, 1984

1983
PACS: A Parallel Microprocessor Array for Scientific Calculations
ACM Trans. Comput. Syst., 1983

Highly Parallel Processor Array "PAX" for Wide Scientific Applications.
Proceedings of the International Conference on Parallel Processing, 1983


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