Tsung-Yi Ho
Orcid: 0000-0001-7348-5625Affiliations:
- Chinese University of Hong Kong, Hong Kong, SAR, China
- National Tsing Hua University, Hsinchu, Taiwan (former)
According to our database1,
Tsung-Yi Ho
authored at least 351 papers
between 2003 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024
GNN-Based Concentration Prediction With Variable Input Flow Rates for Microfluidic Mixers.
IEEE Trans. Biomed. Circuits Syst., June, 2024
Dynamic Adaptation Using Deep Reinforcement Learning for Digital Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst., March, 2024
Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024
ACM Trans. Design Autom. Electr. Syst., 2024
ACM Trans. Design Autom. Electr. Syst., 2024
Capacity-Aware Wash Optimization with Dynamic Fluid Scheduling and Channel Storage for Continuous-Flow Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst., 2024
Neural Clamping: Joint Input Perturbation and Temperature Scaling for Neural Network Calibration.
Trans. Mach. Learn. Res., 2024
Medical Image Anal., 2024
CoRR, 2024
When Does Visual Prompting Outperform Linear Probing for Vision-Language Models? A Likelihood Perspective.
CoRR, 2024
The Devil is in the Neurons: Interpreting and Mitigating Social Biases in Pre-trained Language Models.
CoRR, 2024
RIGID: A Training-free and Model-Agnostic Framework for Robust AI-Generated Image Detection.
CoRR, 2024
Defensive Prompt Patch: A Robust and Interpretable Defense of LLMs against Jailbreak Attacks.
CoRR, 2024
TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans.
CoRR, 2024
NaNa and MiGu: Semantic Data Augmentation Techniques to Enhance Protein Classification in Graph Neural Networks.
CoRR, 2024
CoRR, 2024
Evaluating Text-to-Image Generative Models: An Empirical Study on Human Image Synthesis.
CoRR, 2024
Gradient Cuff: Detecting Jailbreak Attacks on Large Language Models by Exploring Refusal Loss Landscapes.
CoRR, 2024
CoRR, 2024
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2024, 2024
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array.
Proceedings of the 53rd International Conference on Parallel Processing, 2024
Be Your Own Neighborhood: Detecting Adversarial Examples by the Neighborhood Relations Built on Self-Supervised Learning.
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
The Devil is in the Neurons: Interpreting and Mitigating Social Biases in Language Models.
Proceedings of the Twelfth International Conference on Learning Representations, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
Parallel Gröbner Basis Rewriting and Memory Optimization for Efficient Multiplier Verification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
LaMUX: Optimized Logic-Gate-Enabled High-Performance Microfluidic Multiplexer Design.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Late Breaking Results: Efficient Built-in Self-Test for Microfluidic Large-Scale Integration (mLSI).
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
RCGP: An Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits based on Efficient Cartesian Genetic Programming.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper).
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
Towards Automated Testing of Multiplexers in Fully Programmable Valve Array Biochips.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
Adaptive Control-Logic Routing for Fully Programmable Valve Array Biochips Using Deep Reinforcement Learning.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
2023
A Cooperative Multiagent Reinforcement Learning Framework for Droplet Routing in Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023
Design-for-reliability and on-the-fly fault tolerance procedure for paper-based digital microfluidic biochips with multiple faults.
Integr., March, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023
NeuralFuse: Learning to Improve the Accuracy of Access-Limited Neural Network Inference in Low-Voltage Regimes.
CoRR, 2023
A Novel Confidence Induced Class Activation Mapping for MRI Brain Tumor Segmentation.
CoRR, 2023
GREAT Score: Global Robustness Evaluation of Adversarial Perturbation using Generative Models.
CoRR, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2023, 2023
Toward Fairness Through Fair Multi-Exit Framework for Dermatological Disease Diagnosis.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2023, 2023
AME-CAM: Attentive Multiple-Exit CAM for Weakly Supervised Segmentation on MRI Brain Tumor.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2023, 2023
Proceedings of the 2023 International Symposium on Physical Design, 2023
SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU.
Proceedings of the 52nd International Conference on Parallel Processing, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
ARMM: Adaptive Reliability Quantification Model of Microfluidic Designs and its Graph-Transformer-Based Implementation.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023
SOAER: Self-Obstacle Avoiding Escape Routing for Paper-Based Digital Microfluidic Biochips.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
GAT-based Concentration Prediction for Random Microfluidic Mixers with Multiple Input Flow Rates.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Towards Compositional Adversarial Robustness: Generalizing Adversarial Training to Composite Semantic Perturbations.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023
2022
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., October, 2022
Demand-Driven Multi-Target Sample Preparation on Resource-Constrained Digital Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization.
IEEE Trans. Computers, 2022
JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits.
IEEE Trans. Computers, 2022
ACM Comput. Surv., 2022
Representative Image Feature Extraction via Contrastive Learning Pretraining for Chest X-ray Report Generation.
CoRR, 2022
Be Your Own Neighborhood: Detecting Adversarial Example by the Neighborhood Relations Built on Self-Supervised Learning.
CoRR, 2022
Proceedings of the Thirty-First International Joint Conference on Artificial Intelligence, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
CoMUX: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer Design.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the IEEE European Test Symposium, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
PPATuner: pareto-driven tool parameter auto-tuning in physical design via gaussian process transfer learning.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
A Lab-Based Investigation of Reaction Time and Reading Performance using Different In-Vehicle Reading Interfaces during Self-Driving.
Proceedings of the AutomotiveUI '22: 14th International Conference on Automotive User Interfaces and Interactive Vehicular Applications, Seoul, Republic of Korea, September 17, 2022
Design-for-Reliability and Probability-Based Fault Tolerance for Paper-Based Digital Microfluidic Biochips with Multiple Faults.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
NR-Router: Non-Regular Electrode Routing with Optimal Pin Selection for Electrowetting-on-Dielectric Chips.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
ACM Trans. Design Autom. Electr. Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Splitter-Aware Multiterminal Routing With Length-Matching Constraint for RSFQ Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Sample Preparation Meets Farey Sequence: A New Design Technique for Free-Flowing Microfluidic Networks.
CoRR, 2021
Holistic and In-Context Design Flow for 2.5D Chiplet-Package Interaction Co-Optimization.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021
Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021
A standalone, programmable digital microfluidics system with multiplexor interface logic.
Proceedings of the 29th Mediterranean Conference on Control and Automation, 2021
Proceedings of the 18th IEEE International Symposium on Biomedical Imaging, 2021
Proceedings of the 38th International Conference on Machine Learning, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
An Optimal Algorithm for Splitter and Buffer Insertion in Adiabatic Quantum-Flux-Parametron Circuits.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Concentration Gradients Enhancement of Christmas-Tree Structure Based on a Look-Up Table.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
3D-Adv: Black-Box Adversarial Attacks against Deep Learning Models through 3D Sensors.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2021
Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
A Multi-Commodity Network Flow Based Routing Algorithm for Paper-Based Digital Microfluidic Biochips.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Robust Roadside Physical Adversarial Attack Against Deep Learning in Lidar Perception Modules.
Proceedings of the ASIA CCS '21: ACM Asia Conference on Computer and Communications Security, 2021
2020
ACM Trans. Design Autom. Electr. Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
URBER: Ultrafast Rule-Based Escape Routing Method for Large-Scale Sample Delivery Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Microfluidic Design for Concentration Gradient Generation Using Artificial Neural Network.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the 27th Annual Network and Distributed System Security Symposium, 2020
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020
Proceedings of the IEEE International Test Conference in Asia, 2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Proceedings of the 17th IEEE International Symposium on Biomedical Imaging, 2020
Transfer Learning without Knowing: Reprogramming Black-box Machine Learning Models with Scarce Data and Limited Resources.
Proceedings of the 37th International Conference on Machine Learning, 2020
Adaptive Droplet Routing in Digital Microfluidic Biochips Using Deep Reinforcement Learning.
Proceedings of the 37th International Conference on Machine Learning, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Do Noises Bother Human and Neural Networks In the Same Way? A Medical Image Analysis Perspective.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2020
Beyond Digital Domain: Fooling Deep Learning Based Recognition System in Physical World.
Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020
Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Micro-Electrode-Dot-Array Digital Microfluidic Biochips: Technology, Design Automation, and Test Techniques.
IEEE Trans. Biomed. Circuits Syst., 2019
Co-placement optimization in sensor-reusable cyber-physical digital microfluidic biochips.
Microelectron. J., 2019
Scheduling algorithms for reservoir- and mixer-aware sample preparation with microfluidic biochips.
Integr., 2019
Emerging Hardware Techniques and EDA Methodologies for Neuromorphic Computing (Dagstuhl Seminar 19152).
Dagstuhl Reports, 2019
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019
Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019
VOM: Flow-Path Validation and Control-Sequence Optimization for Multilayered Continuous-Flow Microfluidic Biochips.
Proceedings of the International Conference on Computer-Aided Design, 2019
Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019
Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
Sample preparation for multiple-reactant bioassays on micro-electrode-dot-array biochips.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
Module Placement under Completion-Time Uncertainty in Micro-Electrode-Dot-Array Digital Microfluidic Biochips.
IEEE Trans. Multi Scale Comput. Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Structural and Functional Test Methods for Micro-Electrode-Dot-Array Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Efficient and Adaptive Error Recovery in a Micro-Electrode-Dot-Array Digital Microfluidic Biochip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
ACM J. Emerg. Technol. Comput. Syst., 2018
SOLAR: Simultaneous optimization of control-layer pins placement and channel routing in flow-based microfluidic biochips.
Proceedings of the 2018 International Symposium on VLSI Design, 2018
Proceedings of the IEEE International Test Conference in Asia, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Design Automation and Test for Flow-Based Biochips: Past Successes and Future Challenges.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Test generation for microfluidic fully programmable valve arrays (FPVAs) with heuristic acceleration.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018
Multi-channel and fault-tolerant control multiplexing for flow-based microfluidic biochips.
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Columba S: a scalable co-layout design automation tool for microfluidic large-scale integration.
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 27th IEEE Asian Test Symposium, 2018
Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Delay-Bounded Intravehicle Network Routing Algorithm for Minimization of Wiring Weight and Wireless Transmit Power.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Control-Layer Routing and Control-Pin Minimization for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Adaptation of Biochemical Protocols to Handle Technology-Change for Digital Microfluidics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
IEEE Trans. Biomed. Circuits Syst., 2017
Droplet Size-Aware High-Level Synthesis for Micro-Electrode-Dot-Array Digital Microfluidic Biochips.
IEEE Trans. Biomed. Circuits Syst., 2017
Droplet Size-Aware and Error-Correcting Sample Preparation Using Micro-Electrode-Dot-Array Digital Microfluidic Biochips.
IEEE Trans. Biomed. Circuits Syst., 2017
Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1).
NII Shonan Meet. Rep., 2017
Integr., 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Fast architecture-level synthesis of fault-tolerant flow-based microfluidic biochips.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Scheduling and optimization of genetic logic circuits on flow-based microfluidic biochips.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Transport or Store?: Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage.
Proceedings of the 54th Annual Design Automation Conference, 2017
Component-Oriented High-level Synthesis for Continuous-Flow Microfluidics Considering Hybrid-Scheduling.
Proceedings of the 54th Annual Design Automation Conference, 2017
Hamming-distance-based valve-switching optimization for control-layer multiplexing in flow-based microfluidic biochips.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Obstacle-Avoiding Wind Turbine Placement for Power Loss and Wake Effect Optimization.
ACM Trans. Design Autom. Electr. Syst., 2016
Parasitic-Aware Common-Centroid FinFET Placement and Routing for Current-Ratio Matching.
ACM Trans. Design Autom. Electr. Syst., 2016
Optimization of 3D Digital Microfluidic Biochips for the Multiplexed Polymerase Chain Reaction.
ACM Trans. Design Autom. Electr. Syst., 2016
IEEE Trans. Dependable Secur. Comput., 2016
Integrated Functional and Washing Routing Optimization for Cross-Contamination Removal in Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Reliability-Aware Synthesis With Dynamic Device Mapping and Fluid Routing for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Wash Optimization and Analysis for Cross-Contamination Removal Under Physical Constraints in Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
A Full-Flexibility-Guaranteed Pin-Count Reduction Design for General-Purpose Digital Microfluidic Biochips.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Proceedings of the 2016 IEEE International Test Conference, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016
Sieve-valve-aware synthesis of flow-based microfluidic biochips considering specific biological execution limitations.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
A Verification Guided Approach for Selective Program Transformations for Approximate Computing.
Proceedings of the 25th IEEE Asian Test Symposium, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
Congestion- and timing-driven droplet routing for pin-constrained paper-based microfluidic biochips.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Reliability-Driven Chip-Level Design for High-Frequency Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
ILP-Based Alleviation of Dense Meander Segments With Prioritized Shifting and Progressive Fixing in PCB Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Design and Optimization of a Cyberphysical Digital-Microfluidic Biochip for the Polymerase Chain Reaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
IEEE Des. Test, 2015
IEEE Des. Test, 2015
Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip.
IEEE Des. Test, 2015
A general testing method for digital microfluidic biochips under physical constraints.
Proceedings of the 2015 IEEE International Test Conference, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD Chips.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
Proceedings of the European Conference on Circuit Theory and Design, 2015
PACOR: practical control-layer routing flow with length-matching constraint for flow-based microfluidic biochips.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Design and optimization of 3D digital microfluidic biochips for the polymerase chain reaction.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Intra-vehicle network routing algorithm for wiring weight and wireless transmit power minimization.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Hardware/Software Co-Design and Optimization for Cyberphysical Integration in Digital Microfluidic Biochips.
Springer, ISBN: 978-3-319-09005-4, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Biochemistry Synthesis on a Cyberphysical Digital Microfluidics Platform Under Completion-Time Uncertainties in Fluidic Operations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration.
ACM J. Emerg. Technol. Comput. Syst., 2014
ACM J. Emerg. Technol. Comput. Syst., 2014
IPSJ Trans. Syst. LSI Des. Methodol., 2014
Test generation and design-for-testability for flow-based mVLSI microfluidic biochips.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Tutorial T5: Microfluidic Biochips: Connecting VLSI and Embedded Systems to the Life Sciences.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Efficient building identification using structural and spatial information on mobile devices.
Proceedings of the 2013 IEEE International Conference on Multimedia and Expo Workshops, 2014
Vulnerability assessment and defense technology for smart home cybersecurity considering pricing cyberattacks.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Practical Functional and Washing Droplet Routing for Cross-Contamination Avoidance in Digital Microfluidic Biochips.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 2014 International Conference on Compilers, 2014
Proceedings of the 23rd IEEE Asian Test Symposium, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Wash optimization for cross-contamination removal in flow-based microfluidic biochips.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
A network-flow-based optimal sample preparation algorithm for digital microfluidic biochips.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Real-Time Error Recovery in Cyberphysical Digital-Microfluidic Biochips Using a Compact Dictionary.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013
CoRR, 2013
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
Tutorial: Digital microfluidic biochips: Towards hardware/software co-design and cyber-physical system integration.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
A top-down synthesis methodology for flow-based microfluidic biochips considering valve-switching minimization.
Proceedings of the International Symposium on Physical Design, 2013
On Producing Linear Dilution Gradient of a Sample with a Digital Microfluidic Biochip.
Proceedings of the 2013 International Symposium on Electronic System Design, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Post-route alleviation of dense meander segments in high-performance printed circuit boards.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Optimization of polymerase chain reaction on a cyberphysical digital microfluidic biochip.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Post-route refinement for high-frequency PCBs considering meander segment alleviation.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Design of cyberphysical digital microfluidic biochips under completion-time uncertainties in fluidic operations.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
A network-flow based valve-switching aware binding algorithm for flow-based microfluidic biochips.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
A novel cell placement algorithm for flexible TFT circuit with mechanical strain and temperature consideration.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs.
ACM Trans. Design Autom. Electr. Syst., 2012
ACM Trans. Design Autom. Electr. Syst., 2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Integr., 2012
A nonlinear optimization methodology for resistor matching in analog integrated circuits.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of the International Symposium on Physical Design, 2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
A cyberphysical synthesis approach for error recovery in digital microfluidic biochips.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
An Effective and Efficient Framework for Clock Latency Range Aware Clock Network Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011
Recent research and emerging challenges in design and optimization for digital microfluidic biochips.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010
A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips.
Proceedings of the 2010 International Symposium on Physical Design, 2010
A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Digital microfluidic biochips: A vision for functional diversity and more than moore.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
2009
PIXAR: A performance-driven X-architecture router based on a novel multilevel framework.
Integr., 2009
OAL: An obstacle-aware legalization in standard cell placement with displacement minimization.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips.
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
Analog Circuits and Signal Processing, Springer, ISBN: 978-1-4020-6194-3, 2007
2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
Proceedings of the 2004 International Symposium on Physical Design, 2004
2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003