Tsung-Wei Huang

Orcid: 0000-0001-9768-3378

According to our database1, Tsung-Wei Huang authored at least 117 papers between 2009 and 2024.

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Bibliography

2024
Text-Driven Synchronized Diffusion Video and Audio Talking Head Generation.
Proceedings of the 7th IEEE International Conference on Multimedia Information Processing and Retrieval, 2024

BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph Parallelism.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis Workloads.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Incremental Critical Path Generation for Dynamic Graphs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System.
Proceedings of the 2024 International Symposium on Physical Design, 2024

FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array.
Proceedings of the 53rd International Conference on Parallel Processing, 2024

GSAP: A GPU-Accelerated Stochastic Graph Partitioner.
Proceedings of the 53rd International Conference on Parallel Processing, 2024

An Efficient Task-Parallel Pipeline Programming Framework.
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2024

TaroRTL: Accelerating RTL Simulation Using Coroutine-Based Heterogeneous Task Graph Scheduling.
Proceedings of the Euro-Par 2024: Parallel Processing, 2024

V-Trans4Style: Visual Transition Recommendation for Video Production Style Adaptation.
Proceedings of the Computer Vision - ECCV 2024, 2024

The Multiplane Image Information SEI Message and its Use for Distribution of Volumetric Video with Conventional Codecs.
Proceedings of the Data Compression Conference, 2024

Heterogeneous Static Timing Analysis with Advanced Delay Calculator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

G-kway: Multilevel GPU-Accelerated k-way Graph Partitioner.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Ink: Efficient Incremental k-Critical Path Generation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Anytime Multi-Agent Path Finding using Operation Parallelism in Large Neighborhood Search.
Proceedings of the 23rd International Conference on Autonomous Agents and Multiagent Systems, 2024

A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
Accelerating Static Timing Analysis Using CPU-GPU Heterogeneous Parallelism.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

A GPU-Accelerated Framework for Path-Based Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

A Robust Hybrid Classical and Quantum Model for Short-Term Wind Speed Forecasting.
IEEE Access, 2023

Taiwan Student Quantum Computer Society.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

qTask: Task-parallel Quantum Circuit Simulation with Incrementality.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Parallel And-Inverter Graph Simulation Using a Task-graph Computing System.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU.
Proceedings of the 52nd International Conference on Parallel Processing, 2023

Film Grain Removal Using Metadata.
Proceedings of the IEEE International Conference on Image Processing, 2023

Invited Paper: Overview of 2023 CAD Contest at ICCAD.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

uSAP: An Ultra-Fast Stochastic Graph Partitioner.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

Fast STA Graph Partitioning Framework for Multi-GPU Acceleration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Neural Segmentation Field in 3D Scene.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2022
Accelerating Large Sparse Neural Network Inference Using GPU Task Graph Parallelism.
IEEE Trans. Parallel Distributed Syst., 2022

Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System.
IEEE Trans. Parallel Distributed Syst., 2022

Taskflow: A General-Purpose Parallel and Heterogeneous Task Programming System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++.
CoRR, 2022

Concurrent CPU-GPU Task Programming using Modern C++.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus.
Proceedings of the 51st International Conference on Parallel Processing, 2022

Overview of 2022 CAD Contest at ICCAD.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Task-Parallel Programming with Constrained Parallelism.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Composing Pipeline Parallelism using Control Taskflow Graph.
Proceedings of the HPDC '22: The 31st International Symposium on High-Performance Parallel and Distributed Computing, Minneapolis, MN, USA, 27 June 2022, 2022

Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Efficient Critical Paths Search Algorithm using Mergeable Heap.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

OpenTimer v2: A New Parallel Incremental Timing Analysis Engine.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

OpenTimer v2: A Parallel Incremental Timing Analysis Engine.
IEEE Des. Test, 2021

Machine Learning System-Enabled GPU Acceleration for EDA.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

TFProf: Profiling Large Taskflow Programs with Modern D3 and C++.
Proceedings of the IEEE/ACM International Workshop on Programming and Performance Visualization Tools, 2021

Revertible Guidance Image Based Image Detail Enhancement.
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021

Overview of 2021 CAD Contest at ICCAD.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

GPU-accelerated Critical Path Generation with Path Constraints.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

A High-Performance Heterogeneous Critical Path Analysis Framework.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

Efficient GPU Computation Using Task Graph Parallelism.
Proceedings of the Euro-Par 2021: Parallel Processing, 2021

An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads.
Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021

Taskflow-San: Sanitizing Erroneous Control Flow in Taskflow Graphs.
Proceedings of the 6th IEEE/ACM International Workshop on Extreme Scale Programming Models and Middleware, 2021

GPU-accelerated Path-based Timing Analysis.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

ATM: A High Accuracy Extracted Timing Model for Hierarchical Timing Analysis.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Mermin's inequalities of multiple qubits with orthogonal measurements on IBM Q 53-qubit system.
Quantum Eng., 2020

Cpp-Taskflow v2: A General-purpose Parallel and Heterogeneous Task Programming System at Scale.
CoRR, 2020

Programming Systems for Parallelizing VLSI CAD and Beyond.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

An Efficient Work-Stealing Scheduler for Task Dependency Graph.
Proceedings of the 26th IEEE International Conference on Parallel and Distributed Systems, 2020

Overview of 2020 CAD Contest at ICCAD.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

A General-purpose Parallel and Heterogeneous Task Programming System for VLSI CAD.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

GPU-Accelerated Static Timing Analysis.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Fish Tracking and Segmentation From Stereo Videos on the Wild Sea Surface for Electronic Monitoring of Rail Fishing.
IEEE Trans. Circuits Syst. Video Technol., 2019

DtCraft: A High-Performance Distributed Execution Engine at Scale.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

A Modern C++ Parallel Task Programming Library.
Proceedings of the 27th ACM International Conference on Multimedia, 2019

Cpp-Taskflow: Fast Task-Based Parallel Programming Using Modern C++.
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

Recognizing Fish Species Captured Live on Wild Sea Surface in Videos by Deep Metric Learning with a Temporal Constraint.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019

An Efficient and Composable Parallel Task Programming Library.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

A General Cache Framework for Efficient Generation of Timing Critical Paths.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Distributed Timing Analysis at Scale.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Essential Building Blocks for Creating an Open-source EDA Project.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Multi-View Vehicle Re-Identification using Temporal Attention Model and Metadata Re-ranking.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019

Multi-Camera Tracking of Vehicles based on Deep Features Re-ID and Trajectory-Based Camera Link Models.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019

2018
A General-purpose Distributed Programming System using Data-parallel Streams.
Proceedings of the 2018 ACM Multimedia Conference on Multimedia Conference, 2018

Routing at compile time.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

A Distributed Power Grid Analysis Framework from Sequential Stream Graph.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

MtDetector: A High-performance Marine Traffic Detector at Stream Scale.
Proceedings of the 12th ACM International Conference on Distributed and Event-based Systems, 2018

2017
Distributed timing analysis
PhD thesis, 2017

DtCraft: A distributed execution engine for compute-intensive applications.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
UI-Timer 1.0: An Ultrafast Path-Based Timing Analysis Algorithm for CPPR.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Live Tracking of Rail-Based Fish Catching on Wild Sea Surface.
Proceedings of the 2nd ICPR Workshop on Computer Vision for Analysis of Underwater Imagery, 2016

Chute based automated fish length measurement and water drop detection.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

A distributed timing analysis framework for large designs.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce.
Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015

Accelerated Path-Based Timing Analysis with MapReduce.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

OpenTimer: A High-Performance Timing Analysis Tool.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

UI-route: An ultra-fast incremental maze routing algorithm.
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2014

UI-timer: an ultra-fast clock network pessimism removal algorithm.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Fast path-based timing analysis for CPPR.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

2013
A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2012
Integrated fluidic-chip co-design methodology for digital microfluidic biochips.
Proceedings of the International Symposium on Physical Design, 2012

Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Recent research and emerging challenges in design and optimization for digital microfluidic biochips.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

A SAT-based routing algorithm for cross-referencing biochips.
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011

Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips.
Proceedings of the 48th Design Automation Conference, 2011

2010
A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips.
Proceedings of the 2010 International Symposium on Physical Design, 2010

A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009
A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips.
Proceedings of the 27th International Conference on Computer Design, 2009

A contamination aware droplet routing algorithm for digital microfluidic biochips.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009


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