Tsung-Che Lu
According to our database1,
Tsung-Che Lu
authored at least 11 papers
between 2011 and 2024.
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Bibliography
2024
An On-Chip Current-Sink-Free Adaptive-Timing Power Impedance Measurement (PIM) Unit for 3D-IC in 5nm FinFET Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2021
Proceedings of the 93rd IEEE Vehicular Technology Conference, 2021
A Cost-Effective On-Chip Power Impedance Measurement (PIM) System in 7nm FinFET for HPC Applications.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2019
Hardware-oriented Memory-limited Online Fastica Algorithm and Hardware Architecture for Signal Separation.
Proceedings of the IEEE International Conference on Acoustics, 2019
2018
FPGA-Oriented Real-Time EMD-Based Breath Signal Processing System on ARM11 MPCore Platform.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2016
Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing.
J. Signal Process. Syst., 2016
2014
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
Multiple stopping criteria and high-precision EMD architecture implementation for Hilbert-Huang transform.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
2011
A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011