Tsunato Nakai
According to our database1,
Tsunato Nakai
authored at least 12 papers
between 2014 and 2024.
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Bibliography
2024
Proc. Priv. Enhancing Technol., January, 2024
Co-designing Trusted Execution Environment and Model Encryption for Secure High-Performance DNN Inference on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Evaluation of Membership Inference Attack Against Federated Learning With Differential Privacy on Edge Devices.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
2022
Proceedings of the Applied Cryptography and Network Security Workshops, 2022
2021
Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021
Towards Trained Model Confidentiality and Integrity Using Trusted Execution Environments.
Proceedings of the Applied Cryptography and Network Security Workshops, 2021
2019
Whitelisting Cyber Attack Detection according to Estimated Operational States for CPS.
Proceedings of the 17th IEEE International Conference on Industrial Informatics, 2019
2018
Intrusion Detection Method Using Enhanced Whitelist Based on Cooperation of System Development, System Deployment, and Device Development Domains in CPS.
Proceedings of the Advances in Network-Based Information Systems, 2018
2017
Proceedings of the 5th IEEE/ACM International FME Workshop on Formal Methods in Software Engineering, 2017
2015
Tamper-resistant authentication system with side-channel attack resistant AES and PUF using MDR-ROM.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Side-channel attack resistant AES cryptographic circuits with ROM reducing address-dependent EM leaks.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014