Tsu-Jae King Liu

Affiliations:

University of California, Berkeley, CA, USA

According to our database¹, Tsu-Jae King Liu authored at least 31 papers between 2002 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Awards

IEEE Fellow

IEEE Fellow 2007, "For applications of silicon-germanium thin films to metal oxide semiconductor transistors and microelectro mechanical systems".

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

SiGe/Si Heterojunction Drain Transistor for Faster 3D NAND Flash Memory Erase.

[BibT_eX]

[DOI]

Dasom Lee

Tsu-Jae King Liu

Proceedings of the IEEE International Memory Workshop, 2024

MOSFET Probabilistic-Bit Behavior.

[BibT_eX]

[DOI]

Lars P. Tatum

Xiangwei Kong

Vladimir Marko Stojanovic

Tsu-Jae King Liu

Proceedings of the Device Research Conference, 2024

2022

Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies.

[BibT_eX]

[DOI]

CoRR, 2022

2020

Scanning the Issue.

[BibT_eX]

[DOI]

H.-S. Philip Wong

Kerem Akarvardar

Dimitri A. Antoniadis

Proc. IEEE, 2020

A Density Metric for Semiconductor Technology [Point of View].

[BibT_eX]

[DOI]

H.-S. Philip Wong

Kerem Akarvardar

Dimitri A. Antoniadis

Proc. IEEE, 2020

2015

Nanoelectromechanical Switches for Low-Power Digital Computing.

[BibT_eX]

[DOI]

Alexis Peschot

Chuang Qian

Tsu-Jae King Liu

Micromachines, 2015

2014

Why hybridize NEMS with CMOS?

[BibT_eX]

[DOI]

Mihai Tache

Valeriu Beiu

Tsu-Jae King Liu

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

Relays do not leak: CMOS does.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

Quasi-Planar Tri-gate (QPT) bulk CMOS technology for single-port SRAM application.

[BibT_eX]

[DOI]

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011

Characterization of Dynamic SRAM Stability in 45 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2011

Demonstration of Integrated Micro-Electro-Mechanical Relay Circuits for VLSI Applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2011

2010

SRAM Read/Write Margin Enhancements Using FinFETs.

[BibT_eX]

[DOI]

Andrew Carlson

Zheng Guo

Sriram Balasubramanian

Radu Zlatanovici

Tsu-Jae King Liu

Borivoje Nikolic

IEEE Trans. Very Large Scale Integr. Syst., 2010

Mechanical Computing Redux: Relays for Integrated Circuit Applications.

[BibT_eX]

[DOI]

Proc. IEEE, 2010

SRAM stability characterization using tunable ring oscillators in 45nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Demonstration of integrated micro-electro-mechanical switch circuits for VLSI applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

SRAM design in fully-depleted SOI technology.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Parameter-specific ring oscillator for process monitoring at the 45 nm node.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

Analysis and demonstration of MEM-relay power gating.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

Large-Scale SRAM Variability Characterization in 45 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

2008

Technologies for Cofabricating MEMS and Electronics.

[BibT_eX]

[DOI]

Proc. IEEE, 2008

Fully Integrated CMOS Power Amplifier With Efficiency Enhancement at Power Back-Off.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

Integrated circuit design with NEM relays.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Compensation of systematic variations through optimal biasing of SRAM wordlines.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006

A 1.2V, 2.4GHz Fully Integrated Linear CMOS Power Amplifier with Efficiency Enhancement.

[BibT_eX]

[DOI]

Gang Liu

Tsu-Jae King Liu

Ali M. Niknejad

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2005

FinFET-based SRAM design.

[BibT_eX]

[DOI]

Zheng Guo

Sriram Balasubramanian

Radu Zlatanovici

Tsu-Jae King

Borivoje Nikolic

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

FinFETs for nanoscale CMOS digital integrated circuits.

[BibT_eX]

[DOI]

Tsu-Jae King

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2003

Extremely scaled silicon nano-CMOS devices.

[BibT_eX]

[DOI]

Proc. IEEE, 2003

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

Frequency-independent equivalent-circuit model for on-chip spiral inductors.

[BibT_eX]

[DOI]

Jean-Olivier Plouchart

Richard A. Wachnik

Tsu-Jae King

Chenming Hu

IEEE J. Solid State Circuits, 2003

2002

Loop-based interconnect modeling and optimization approach for multi-GHz clock network design.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

Tsu-Jae King Liu

Awards

IEEE Fellow

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

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