Truong Nguyen-Ly

Orcid: 0000-0002-7422-4600

According to our database1, Truong Nguyen-Ly authored at least 9 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2022
High-Performance and Low-Complexity Decoding Algorithms for 5G Low-Density Parity-Check Codes.
J. Commun., 2022

2018
Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms. (Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul).
PhD thesis, 2017

High Throughput FPGA Implementation for regular Non-Surjective Finite Alphabet Iterative Decoders.
Proceedings of the 2017 IEEE International Conference on Communications Workshops, 2017

2016
Non-surjective finite alphabet iterative decoders.
Proceedings of the 2016 IEEE International Conference on Communications, 2016

Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Code-aware quantizer design for finite-precision min-sum decoders.
Proceedings of the 2016 IEEE International Black Sea Conference on Communications and Networking, 2016

2015
FPGA design of high throughput LDPC decoder based on imprecise Offset Min-Sum decoding.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

2013
Design and Implementation of a SoPC System for Speech Recognition.
Proceedings of the Multimedia and Ubiquitous Engineering, 2013


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