Trond Ytterdal
Orcid: 0000-0002-2109-833X
According to our database1,
Trond Ytterdal
authored at least 85 papers
between 2000 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
2024
IEEE Trans. Very Large Scale Integr. Syst., January, 2024
Interfacing GaN HEMTs with Josephson Junctions: A Novel Approach to High-Frequency Electronics.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
High-level Comparison of Control-Bounded A/D Converters and Continuous- Time Sigma-Delta Modulators.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
2021
Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
GNRFET-Based DC-DC Converters for Low Power Data Management in ULSI System, a Feasibility Study.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Benefiting From State Dependencies in Asymmetric SRAM Cells Through Conditional Word-Flipping.
IEEE Trans. Very Large Scale Integr. Syst., 2020
An Energy Efficient Level Shifter Capable of Logic Conversion From Sub-15 mV to 1.2 V.
IEEE Trans. Circuits Syst., 2020
Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
A Power Efficient, High Gain and High Input Impedance Capacitively-coupled Neural Amplifier.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Emerging Josephson Junction/Graphene Device Technologies towards THz Signal Generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
A High-Voltage Cascode-Connected Three-Level Pulse-Generator for Bio-Medical Ultrasound Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
Ultra-low voltage and energy efficient adders in 28 nm FDSOI exploring poly-biasing for device sizing.
Microprocess. Microsystems, 2018
A loadless 6T SRAM cell for sub- & near- threshold operation implemented in 28 nm FD-SOI CMOS technology.
Integr., 2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
2017
A 1 MHz BW 34.2 fJ/step Continuous Time Delta Sigma Modulator With an Integrated Mixer for Cardiac Ultrasound.
IEEE Trans. Biomed. Circuits Syst., 2017
IEEE Trans. Biomed. Circuits Syst., 2017
Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI.
Microprocess. Microsystems, 2017
A Compiled 9-bit 20-MS/s 3.5-fJ/conv.step SAR ADC in 28-nm FDSOI for Bluetooth Low Energy Receivers.
IEEE J. Solid State Circuits, 2017
An 11.0 bit ENOB, 9.8 fJ/conv.-step noise-shaping SAR ADC calibrated by least squares estimation.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
A 54-µW Inverter-Based Low-Noise Single-Ended to Differential VGA for Second Harmonic Ultrasound Probes in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Low-power low-area beamformer design using switched-current ARAM using external capacitors.
Microelectron. J., 2016
Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array.
Microelectron. J., 2016
Low noise, -50 dB second harmonic distortion single-ended to differential switched-capacitive variable gain amplifier for ultrasound imaging.
IET Circuits Devices Syst., 2016
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block.
Proceedings of the 2016 MIXDES, 2016
Noise transfer functions and loop filters especially suited for noise-shaping SAR ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
A compiled 3.5fJ/conv.step 9b 20MS/s SAR ADC for wireless applications in 28nm FDSOI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Comparative analysis of flip-flop architectures for subthreshold applications in 28nm FDSOI.
Proceedings of the Nordic Circuits and Systems Conference, 2015
An ultra-low-power/high-speed 9-bit adder design: Analysis and comparison Vs. technology from 130nm-LP to UTBB FD-SOI-28nm.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the European Conference on Circuit Theory and Design, 2015
Inverter-based Low-power, low-noise SC-VGA and 8 channel pipelined S/H analog beamformer for ultrasound imaging probes.
Proceedings of the European Conference on Circuit Theory and Design, 2015
A differential inverter-based switched-capacitor oscillator in 65 nm CMOS technology.
Proceedings of the European Conference on Circuit Theory and Design, 2015
Proceedings of the European Conference on Circuit Theory and Design, 2015
Exploiting short channel effects and multi-Vt technology for increased robustness and reduced energy consumption, with application to a 16-bit subthreshold adder implemented in 65 nm CMOS.
Proceedings of the European Conference on Circuit Theory and Design, 2015
2014
Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout.
Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014
Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014
A Low-Noise Variable-Gain Amplifier for in-Probe 3D Imaging Applications Based on CMUT Transducers.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
2013
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013
A low noise single-end to differential switched-capacitor VGA for PZT-Xducer ultrasound imaging.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
A low noise single-ended to differential linear charge sampling SC-VGA for second harmonic cardiac ultrasound imaging.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
A low power analog RAM implementation for in-probe beamforming in ultrasound imaging.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
A 65nm CMOS front-end LNA for medical ultrasound imaging with feedback employing noise and distortion cancellation.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Low power OTA-less I-V-converter with single-ended to differential conversion for capacitive sensor interfaces.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
A low-power, low-noise, and low-cost VGA for second harmonic imaging ultrasound probes.
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
2012
Introduction to the Special Issue on the 37th European Solid-State Circuits Conference (ESSCIRC).
IEEE J. Solid State Circuits, 2012
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012
2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2009
Current-Mode Capacitive Sensor Interface Circuit With Single-Ended to Differential Output Capability.
IEEE Trans. Instrum. Meas., 2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Simplified gate level noise injection models for behavioral noise coupling simulation.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
A single-ended to differential capacitive sensor interface circuit designed in CMOS technology.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Behavioral Simulation of Power Line Noise Coupling in Mixed-Signal Systems using SystemC.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Behavioral modeling and simulation of high-speed analog-to-digital converters using SystemC.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
A mixed-signal, functional level simulation framework based on SystemC for system-on-a-chip applications.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000