Trevor C. Caldwell
Orcid: 0009-0003-3880-6421
According to our database1,
Trevor C. Caldwell
authored at least 17 papers
between 2005 and 2025.
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Bibliography
2025
An Energy-Efficient Pipeline-SAR ADC Using Linearized Dynamic Amplifiers and Input Buffer in 22nm FDSOI.
IEEE Open J. Circuits Syst., 2025
2018
A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
SIAM J. Matrix Anal. Appl., 2016
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2014
A Reconfigurable ΔΣ ADC With Up to 100 MHz Bandwidth Using Flash Reference Shuffling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
A reconfigurable ΔΣ modulator with up to 100 MHz bandwidth using flash reference shuffling.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f<sub>0</sub> = 450 MHz Using 550 mW.
IEEE J. Solid State Circuits, 2012
A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2006
IEEE J. Solid State Circuits, 2006
2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005