Travis N. Blalock
According to our database1,
Travis N. Blalock
authored at least 15 papers
between 2001 and 2023.
Collaborative distances:
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Bibliography
2023
A -102dBm Sensitivity, 2.2μA Packet-Level-Duty-cycled Wake-Up Receiver with ADPLL achieving -30dB SIR.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
2010
IEEE Trans. Circuits Syst. II Express Briefs, 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Sub-threshold Operation and Cross-hierarchy Design for Ultra Low Power Wearable Sensors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 4th International ICST Conference on Body Area Networks, 2009
2008
Experimental System Prototype of a Portable, Low-Cost, C-Scan Ultrasound Imaging Device.
IEEE Trans. Biomed. Eng., 2008
2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Dependable Secur. Comput., 2004
2003
A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
2001
True color 1024×768 microdisplay with analog in-pixel pulsewidth modulation and retinal averaging offset correction.
IEEE J. Solid State Circuits, 2001