Toshiyuki Matsunaga
According to our database1,
Toshiyuki Matsunaga
authored at least 2 papers
in 1997.
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Bibliography
1997
Tests for small gate delay faults in combinational circuits and a test generation method.
Syst. Comput. Jpn., 1997
A Method of Generating Tests for Marginal Delays an Delay Faults in Combinational Circuits.
Proceedings of the 6th Asian Test Symposium (ATS '97), 17-18 November 1997, 1997