Toshishige Shimamura

According to our database, Toshishige Shimamura authored at least 11 papers between 2002 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

Ultra-low-power circuit techniques for mm-size wireless sensor nodes with energy harvesting.

Hiroki Morimura, Shoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Mitsuru Harada

IEICE Electron. Express, 2014

2012

1-cm³ event-driven wireless sensor nodes.

Shoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Hiroki Morimura, Mitsuru Harada

Proceedings of the IEEE International Conference on Communication Systems, 2012

2011

Design and Performance of a Sub-Nano-Ampere Two-Stage Power Management Circuit in 0.35-µm CMOS for Dust-Size Sensor Nodes.

Mamoru Ugajin, Toshishige Shimamura, Shin'ichiro Mutoh, Mitsuru Harada

IEICE Trans. Electron., 2011

2010

Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIs.

Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Mamoru Nakanishi, Katsuyuki Machida

IEEE J. Solid State Circuits, 2010

Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applications.

Toshishige Shimamura, Mamoru Ugajin, Kenji Suzuki, Kazuyoshi Ono, Norio Sato, Kei Kuwabara, Hiroki Morimura, Shin'ichiro Mutoh

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

A Fingerprint Sensor with Impedance Sensing for Fraud Detection.

Toshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI.

Satoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi

IEICE Trans. Electron., 2007

2006

Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and Identifier.

Satoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi

IEICE Trans. Electron., 2006

2005

A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation.

Takakuni Douseki, Toshishige Shimamura, Nobutaro Shibata

IEICE Trans. Electron., 2005

2002

A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIs.

Hiroki Morimura, Satoshi Shigematsu, Toshishige Shimamura, Katsuyuki Machida, Hakaru Kyuragi

IEEE J. Solid State Circuits, 2002

A 500-dpi cellular-logic processing array for fingerprint-image enhancement and verification.

Koji Fujii, Mamoru Nakanishi, Satoshi Shigematsu, Hiroki Morimura, Takahiro Hatano, Namiko Ikeda, Toshishige Shimamura, Yukio Okazaki, Hakaru Kyuragi

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002