Toshiro Akino

According to our database1, Toshiro Akino authored at least 9 papers between 1979 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
Toward 100 Mega-Frames per Second: Design of an Ultimate Ultra-High-Speed Image Sensor.
Sensors, 2010

Ultra-High-Speed Image Signal Accumulation Sensor.
Sensors, 2010

2006
A Clock Generator Driven by a Unified-CBiCMOS Buffer Driver for High Speed and Low Energy Operation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2005
A high-speed domino CMOS full adder driven by a new unified-BiCMOS inverter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2002
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

1997
A two-dimensional transistor placement for cell synthesis.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1995
A new layout synthesis for leaf cell design.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994
A New Approach of Fractional-Dimension Based Module Clustering for VLSI Layout.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1979
Circuit simulation and timing verification based on MOS/LSI mask information.
Proceedings of the 16th Design Automation Conference, 1979


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