Toshio Sudo

According to our database1, Toshio Sudo authored at least 6 papers between 1995 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2004, "For contributions to high-density packaging.".

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2013
Anti-resonance peak frequency control by variable on-die capacitance.
Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013

Evaluation of PDN impedance and power supply noise for different on-chip decoupling structures.
Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013

2011
PDN impedance and SSO noise simulation of 3D system-in-package with a widebus structure.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2009
Ultralow impedance evaluation system of wideband frequency for power distribution network of decoupling capacitor embedded substrates.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2005
Radiated Harmonics Characterization of CMOS Test Chip with On-Chip Decoupling Capacitance.
IEICE Trans. Commun., 2005

1995
Present and future directions for multichip module technologies.
IEEE J. Solid State Circuits, April, 1995


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