Toshiki Kanamoto

Orcid: 0000-0002-6326-6960

According to our database1, Toshiki Kanamoto authored at least 41 papers between 1999 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
A Contactless LSI Test Method Utilizing Direct Emission From On-Chip Interconnects.
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024

2023
Bayesian neural network based inductance calculations of wireless power transfer systems.
IEICE Electron. Express, 2023

Electronic component placement optimization for heat measures of smartglasses.
IEICE Electron. Express, 2023

A parabolic spiral coil transmitter with uniform magnetic field for smart devices.
IEICE Electron. Express, 2023

A thermally optimizing method of thin film resistor trimming with machine learning.
IEICE Electron. Express, 2023

Ultra-Low-Latency Video Coding with Reduced Frame Memory Structure for 4K/8K High-Resolution Video.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

LoRa Based Wireless Sensor Network for Bus Tracking System in Contoured Castle Town.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

2022
A bernoulli spiral coil transmitter for charging various small electronic devices.
IEICE Electron. Express, 2022

Receiver coil built into belt for heat dissipation of watch-type smart devices.
IEICE Electron. Express, 2022

Enhanced laser trimming of thin film resistors dedicated to snubber for high power IGBT modules.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

2021
Effective methods to promote heat dissipation of wrist wearables.
IEICE Electron. Express, 2021

A Virtual Optical Holographic Encryption System Using Expanded Diffie-Hellman Algorithm.
IEEE Access, 2021

2020
Thermal Model and Countermeasures for Future Smart Glasses.
Sensors, 2020

Thermal placement on PCB of components including 3D ICs.
IEICE Electron. Express, 2020

A simple yet precise capacitance estimation method for on-chip power delivery network towards EMC analysis.
IEICE Electron. Express, 2020

2019
A Single-Stage RISC-V Processor to Mitigate the Von Neumann Bottleneck.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Hardware Trojan Insertion and Detection in Asynchronous Circuits.
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018
Impact of mutual inductance on timing in nano-scale SoC.
IEICE Electron. Express, 2018

2015
Structure optimization for timing in nano scale FinFET.
IEICE Electron. Express, 2015

2014
Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate.
IEICE Electron. Express, 2014

2013
Supply Noise Suppression by Triple-Well Structure.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2010
Exhaustive and Systematic Accuracy Verification and Enhancement of STI Stress Compact Model for General Realistic Layout Patterns.
IEICE Trans. Electron., 2010

A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

Impact of Self-Heating in Wire Interconnection on Timing.
IEICE Trans. Electron., 2010

2009
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

2008
A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Impact of Well Edge Proximity Effect on Timing.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

2007
A Fast Characterizing Method for Large Embedded Memory Modules on SoC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Si-Substrate Modeling toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2005
A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2004
Efficient capacitance extraction method for interconnects with dummy fills.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

1999
The D30V/MPEG multimedia processor.
IEEE Micro, 1999


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