Toshihiro Hanawa

According to our database, Toshihiro Hanawa authored at least 65 papers between 1994 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

MPI-Adapter2: An Automatic ABI Translation Library Builder for MPI Application Binary Portability.

Shinji Sumimoto, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region Workshops, 2024

Optimize Efficiency of Utilizing Systems by Dynamic Core Binding.

Masatoshi Kawai, Akihiro Ida, Toshihiro Hanawa, Tetsuya Hoshino

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region Workshops, 2024

2023

Dynamic Core Binding for Load Balancing of Applications Parallelized with MPI/OpenMP.

Masatoshi Kawai, Akihiro Ida, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the Computational Science - ICCS 2023, 2023

2022

mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations.

Toyotaro Suzumura, Akiyoshi Sugiki, Hiroyuki Takizawa, Akira Imakura, Hiroshi Nakamura, Kenjiro Taura, Tomohiro Kudoh, Toshihiro Hanawa, Yuji Sekiya, Hill Hiroki Kobayashi, Shin Matsushima, Yohei Kuga, Ryo Nakamura, Renhe Jiang, Junya Kawase, Masatoshi Hanai, Hiroshi Miyazaki, Tsutomu Ishizaki, Daisuké Shimotoku, Daisuke Miyamoto, Kento Aida, Atsuko Takefusa, Takashi Kurimoto, Koji Sasayama, Naoya Kitagawa, Ikki Fujiwara, Yusuke Tanimura, Takayuki Aoki, Toshio Endo, Satoshi Ohshima, Keiichiro Fukazawa, Susumu Date, Toshihiro Uchibayashi

CoRR, 2022

A System-Wide Communication to Couple Multiple MPI Programs for Heterogeneous Computing.

Shinji Sumimoto, Takashi Arakawa, Yoshio Sakaguchi, Hiroya Matsuba, Hisashi Yashiro, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022

A Process Management Runtime with Dynamic Reconfiguration.

Shinji Sumimoto, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the HPCAsia 2022 Workshop: International Conference on High Performance Computing in Asia-Pacific Region Workshops, Virtual Event Japan, January 11, 2022

Offloading Transprecision Calculation Using FPGA.

Tadayoshi Hara, Toshihiro Hanawa

Proceedings of the HPCAsia 2022 Workshop: International Conference on High Performance Computing in Asia-Pacific Region Workshops, Virtual Event Japan, January 11, 2022

mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations.

Toyotaro Suzumura, Akiyoshi Sugiki, Hiroyuki Takizawa, Akira Imakura, Hiroshi Nakamura, Kenjiro Taura, Tomohiro Kudoh, Toshihiro Hanawa, Yuji Sekiya, Hill Hiroki Kobayashi, Yohei Kuga, Ryo Nakamura, Renhe Jiang, Junya Kawase, Masatoshi Hanai, Hiroshi Miyazaki, Tsutomu Ishizaki, Daisuké Shimotoku, Daisuke Miyamoto, Kento Aida, Atsuko Takefusa, Takashi Kurimoto, Koji Sasayama, Naoya Kitagawa, Ikki Fujiwara, Yusuke Tanimura, Takayuki Aoki, Toshio Endo, Satoshi Ohshima, Keiichiro Fukazawa, Susumu Date, Toshihiro Uchibayashi

Proceedings of the IEEE Intl. Conf. on Dependable, 2022

Optimizations of H-matrix-vector Multiplication for Modern Multi-core Processors.

Tetsuya Hoshino, Akihiro Ida, Toshihiro Hanawa

Proceedings of the IEEE International Conference on Cluster Computing, 2022

2021

Automatic Graph Partitioning for Very Large-scale Deep Learning.

Masahiro Tanaka, Kenjiro Taura, Toshihiro Hanawa, Kentaro Torisawa

Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

2020

Development of training environment for deep learning with medical images on supercomputer system based on asynchronous parallel Bayesian optimization.

Yukihiro Nomura, Issei Sato, Toshihiro Hanawa, Shouhei Hanaoka, Takahiro Nakao, Tomomi Takenaga, Tetsuya Hoshino, Yuji Sekiya, Soichiro Miki, Takeharu Yoshikawa, Naoto Hayashi, Osamu Abe

J. Supercomput., 2020

Footprint-Aware Power Capping for Hybrid Memory Based Systems.

Eishi Arima, Toshihiro Hanawa, Carsten Trinitis, Martin Schulz

Proceedings of the High Performance Computing - 35th International Conference, 2020

Distribution System for Japanese Synthetic Population Data with Protection Level.

Tadahiko Murata, Susumu Date, Yusuke Goto, Toshihiro Hanawa, Takuya Harada, Manabu Ichikawa, Lee Hao, Masaharu Munetomo, Akiyoshi Sugiki

Proceedings of the International Conference on Machine Learning and Cybernetics, 2020

Analysis of Cooling Water Temperature Impact on Computing Performance and Energy Consumption.

Jorji Nonaka, Toshihiro Hanawa, Fumiyoshi Shoji

Proceedings of the IEEE International Conference on Cluster Computing, 2020

2019

Evaluation of XcalableACC with tightly coupled accelerators/InfiniBand hybrid communication on accelerated cluster.

Masahiro Nakao, Tetsuya Odajima, Hitoshi Murai, Akihiro Tabuchi, Norihisa Fujita, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Int. J. High Perform. Comput. Appl., 2019

2018

10-Gbps Real-time Burst-Frame Synchronization Using Dual-Stage Detection for Full-Software Optical Access Systems.

Takahiro Suzuki, Sang-Yuep Kim, Junichi Kani, Akihiro Otaka, Toshihiro Hanawa

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

Coherent Receiver DSP Implemented on a General-Purpose Server for Full Software-Defined Optical Access.

Sang-Yuep Kim, Takahiro Suzuki, Junichi Kani, Akihiro Otaka, Toshihiro Hanawa

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

Design of Parallel BEM Analyses Framework for SIMD Processors.

Tetsuya Hoshino, Akihiro Ida, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the Computational Science - ICCS 2018, 2018

Scaling collectives on large clusters using Intel(R) architecture processors and fabric.

Masashi Horikoshi, Larry Meadows, Tom Elken, Pradeep Sivakumar, Edward Mascarenhas, James Erwin, Dmitry Durnov, Alexander Sannikov, Toshihiro Hanawa, Taisuke Boku

Proceedings of the Proceedings of Workshops of HPC Asia 2018, 2018

Load-Balancing-Aware Parallel Algorithms of H-Matrices with Adaptive Cross Approximation for GPUs.

Tetsuya Hoshino, Akihiro Ida, Toshihiro Hanawa, Kengo Nakajima

Proceedings of the IEEE International Conference on Cluster Computing, 2018

2017

Communication-Computation Overlapping with Dynamic Loop Scheduling for Preconditioned Parallel Iterative Solvers on Multicore and Manycore Clusters.

Kengo Nakajima, Toshihiro Hanawa

Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017

Performance Evaluation of PEACH3: Field-Programmable Gate Array Switch for Tightly Coupled Accelerators.

Takahiro Kaneda, Ryotaro Sakai, Naoki Nishikawa, Toshihiro Hanawa, Chiharu Tsuruta, Hideharu Amano

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

2016

Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA.

Kazuya Matsumoto, Norihisa Fujita, Toshihiro Hanawa, Taisuke Boku

Proceedings of the High Performance Computing for Computational Science - VECPAR 2016, 2016

From FLOPS to BYTES: disruptive change in high-performance computing towards the post-moore era.

Satoshi Matsuoka, Hideharu Amano, Kengo Nakajima, Koji Inoue, Tomohiro Kudoh, Naoya Maruyama, Kenjiro Taura, Takeshi Iwashita, Takahiro Katagiri, Toshihiro Hanawa, Toshio Endo

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015

Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication.

Kazuya Matsumoto, Toshihiro Hanawa, Yuetsu Kodama, Hisafumi Fujii, Taisuke Boku

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Reduction calculator in an FPGA based switching Hub for high performance clusters.

Takuya Kuhara, Chiharu Tsuruta, Toshihiro Hanawa, Hideharu Amano

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Hybrid Communication with TCA and InfiniBand on a Parallel Programming Language XcalableACC for GPU Clusters.

Tetsuya Odajima, Taisuke Boku, Toshihiro Hanawa, Hitoshi Murai, Masahiro Nakao, Akihiro Tabuchi, Mitsuhisa Sato

Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture.

Toshihiro Hanawa, Hisafumi Fujii, Norihisa Fujita, Tetsuya Odajima, Kazuya Matsumoto, Yuetsu Kodama, Taisuke Boku

Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

Evaluation of FFT for GPU Cluster Using Tightly Coupled Accelerators Architecture.

Toshihiro Hanawa, Hisafumi Fujii, Norihisa Fujita, Tetsuya Odajima, Kazuya Matsumoto, Taisuke Boku

Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing.

Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano, Hitoshi Murai, Masayuki Umemura, Mitsuhisa Sato

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Parallelization of cipher algorithm on CPU/GPU for real-time software-defined access network.

Takahiro Suzuki, Sang-Yuep Kim, Junichi Kani, Ken-Ichi Suzuki, Akihiro Otaka, Toshihiro Hanawa

Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2015

2014

PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators.

Yuetsu Kodama, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

SIGARCH Comput. Archit. News, 2014

XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters.

Masahiro Nakao, Hitoshi Murai, Takenori Shimosaka, Akihiro Tabuchi, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato

Proceedings of the First Workshop on Accelerator Programming using Directives, 2014

A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators.

Takuya Kuhara, Takahiro Kaneda, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano

Proceedings of the Second International Symposium on Computing and Networking, 2014

QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication.

Norihisa Fujita, Hisafumi Fujii, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Yoshinobu Kuramashi, Mike Clark

Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013

Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators.

Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Adaptive Task Size Control on High Level Programming for GPU/CPU Work Sharing.

Tetsuya Odajima, Taisuke Boku, Mitsuhisa Sato, Toshihiro Hanawa, Yuetsu Kodama, Raymond Namyst, Samuel Thibault, Olivier Aumage

Proceedings of the Algorithms and Architectures for Parallel Processing, 2013

Interconnection Network for Tightly Coupled Accelerators Architecture.

Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato

Proceedings of the IEEE 21st Annual Symposium on High-Performance Interconnects, 2013

Task level pipelining with PEACH2: An FPGA switching fabric for high performance computing.

Takaaki Miyajima, Takuya Kuhara, Toshihiro Hanawa, Hideharu Amano, Taisuke Boku

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

2012

GPU/CPU Work Sharing with Parallel Language XcalableMP-dev for Parallelized Accelerated Computing.

Tetsuya Odajima, Taisuke Boku, Toshihiro Hanawa, Jinpil Lee, Mitsuhisa Sato

Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

DS-Bench Toolset: Tools for dependability benchmarking with simulation and assurance.

Hajime Fujita, Yutaka Matsuno, Toshihiro Hanawa, Mitsuhisa Sato, Shinpei Kato, Yutaka Ishikawa

Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

2011

Peach: A Multicore Communication System on Chip with PCI Express.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku

IEEE Micro, 2011

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation.

Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

XMCAPI: Inter-core Communication Interface on Multi-chip Embedded Systems.

Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, 2011

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

2010

Customizing Virtual Machine with Fault Injector by Integrating with SpecC Device Model for a Software Testing Environment D-Cloud.

Toshihiro Hanawa, Hitoshi Koizumi, Takayuki Banzai, Mitsuhisa Sato, Shin'ichi Miura, Tadatoshi Ishii, Hidehisa Takamizawa

Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Large-Scale Software Testing Environment Using Cloud Computing Technology for Dependable Parallel and Distributed Systems.

Toshihiro Hanawa, Takayuki Banzai, Hitoshi Koizumi, Ryo Kanbayashi, Takayuki Imada, Mitsuhisa Sato

Proceedings of the Third International Conference on Software Testing, 2010

PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express.

Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto

Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010

D-Cloud: Design of a Software Testing Environment for Reliable Distributed Systems Using Cloud Computing Technology.

Takayuki Banzai, Hitoshi Koizumi, Ryo Kanbayashi, Takayuki Imada, Toshihiro Hanawa, Mitsuhisa Sato

Proceedings of the 10th IEEE/ACM International Conference on Cluster, 2010

2009

Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP.

Toshihiro Hanawa, Mitsuhisa Sato, Jinpil Lee, Takayuki Imada, Hideaki Kimura, Taisuke Boku

Proceedings of the Evolving OpenMP in an Age of Extreme Parallelism, 2009

Towards an Open Dependable Operating System.

Yutaka Ishikawa, Hajime Fujita, Toshiyuki Maeda, Motohiko Matsuda, Midori Sugaya, Mitsuhisa Sato, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku, Yuki Kinebuchi, Lei Sun, Tatsuo Nakajima, Jin Nakazawa, Hideyuki Tokuda

Proceedings of the 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2009

RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters.

Shin'ichi Miura, Toshihiro Hanawa, Taiga Yonemoto, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Flexible Multi-link Ethernet Binding System for PC Clusters with Asymmetric Topology.

Taiga Yonemoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

2008

A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection.

Shin'ichi Miura, Taisuke Boku, Takayuki Okamoto, Toshihiro Hanawa

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters.

Shin'ichi Miura, Takayuki Okamoto, Taisuke Boku, Toshihiro Hanawa, Mitsuhisa Sato

Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008

2005

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism).

Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Yasuki Tanabe, Toshihiro Hanawa, Hideharu Amano

Parallel Comput., 2005

Implementation of ISIS-SimpleScalar.

Toshihiro Hanawa, Toshiya Minai, Yasuki Tanabe, Hideharu Amano

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

2003

Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism.

Yasuki Tanabe, Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Toshihiro Hanawa, Hideharu Amano

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

1999

Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture.

Junji Yamamoto, Takashi Fujiwara, T. Komeda, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano

Parallel Comput., 1999

1998

The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip.

Takashi Midorikawa, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano

Proceedings of the ASP-DAC '98, 1998

1997

Adaptive Routing on the Recursive Diagonal Torus.

Akira Funahashi, Toshihiro Hanawa, Hideharu Amano, Tomohiro Kudoh

Proceedings of the High Performance Computing, International Symposium, 1997

1996

Hot spot contention and message combining in the simple serial synchronized multistage interconnection network.

Toshihiro Hanawa, Takashi Fujiwara, Hideharu Amano

Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996

1995

An analysis of the hot spot contention and message combining on the simple serial synchronized-multistage interconnection network.

Kalidou Gaye, Toshihiro Hanawa, Hideharu Amano

Syst. Comput. Jpn., 1995

1994

Multistage Interconnection Networks with Multiple Outlets.

Toshihiro Hanawa, Hideharu Amano, Yoshifumi Fujikawa

Proceedings of the 1994 International Conference on Parallel Processing, 1994