Toshihiko Mori
According to our database1,
Toshihiko Mori
authored at least 28 papers
between 1998 and 2024.
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Bibliography
2024
High-speed and low-power optical DAC transmitter using all-silicon lumped segmented modulator directly driven by CMOS inverter driver.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2024
2022
Highly power-efficient (2 pJ/bit), 128Gbps 16QAM signal generation of coherent optical DAC transmitter using 28-nm CMOS driver and all-silicon segmented modulator.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022
2019
Neural-network assistance to calculate precise eigenvalue for fitness evaluation of real product design.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019
2018
Error-Free Loopback of a Compact 25 Gb/s × 4 ch WDM Transceiver Assembly Incorporating Silicon (De)Multiplexers with Automated Phase-Error Correction.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
Proceedings of the European Conference on Optical Communication, 2018
2017
Low crosstalk simultaneous 12 ch × 25 Gb/s operation of high-density silicon photonics multichannel receiver.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017
Ultra-Low-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach-Zehnder Modulator and 28-nm CMOS Driver.
Proceedings of the European Conference on Optical Communication, 2017
Low Crosstalk Simultaneous 16-channel × 25 Gb/s Operation of High Density Silicon Photonics Optical Transceiver.
Proceedings of the European Conference on Optical Communication, 2017
2016
A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
25.78-Gb/s VCSEL-based optical transceiver with retimer-embedded driver and receiver ICs.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015
A 25 Gbps silicon photonic transmitter and receiver with a bridge structure for CPU interconnects.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015
22.8 A 24-to-35Gb/s x4 VCSEL driver IC with multi-rate referenceless CDR in 0.13um SiGe BiCMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE.
IEEE J. Solid State Circuits, 2014
Proceedings of the Symposium on VLSI Circuits, 2014
3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applications.
Proceedings of the 38th European Solid-State Circuit conference, 2012
2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2003
1999
Customization Rule Generation for Electronic Sales Promotion System in Wholesale Industry.
Proceedings of the First International Workshop on Advance Issues of E-Commerce and Web-Based Information Systems, 1999
1998
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998