Toru Miwa
According to our database1,
Toru Miwa
authored at least 6 papers
between 2008 and 2021.
Collaborative distances:
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Bibliography
2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2019
A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2012
IEEE J. Solid State Circuits, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008