Torsten Rössel

According to our database1, Torsten Rössel authored at least 4 papers between 1993 and 1994.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1994
RESIST: a recursive test pattern generation algorithm for path delay faults considering various test classes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

RESIST: a recursive test pattern generation algorithm for path delay faults.
Proceedings of the Proceedings EURO-DAC'94, 1994

1993
Checking DFT Rules with a VHDL Simulator.
Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993

Integrating SDL and VHDL for System-Level Hardware Design.
Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993


  Loading...