Torsten Mahnke

According to our database, Torsten Mahnke authored at least 4 papers in 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment.

Torsten Mahnke, Walter Stechele, Wolfgang Hoeld

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

A wire load model considering metal layer properties.

Armin Windschiegl, Torsten Mahnke, Michael Eiermann, Walter Stechele, Paul Zuber

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Impact of technology evolution on dual supply voltage scaling and gate resizing in power-driven logic synthesis.

Torsten Mahnke, Walter Stechele, Martin Embacher, Wolfgang Hoeld

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictness.

Torsten Mahnke, Sebastian Panenka, Martin Embacher, Walter Stechele, Wolfgang Hoeld

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002