Toral Shah
Orcid: 0000-0003-4037-2418
According to our database1,
Toral Shah
authored at least 7 papers
between 2015 and 2018.
Collaborative distances:
Collaborative distances:
Timeline
2015
2016
2017
2018
0
1
2
3
4
1
2
1
3
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2018
Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design.
J. Electron. Test., 2018
2017
Proceedings of the 18th IEEE Latin American Test Symposium, 2017
Test pattern generation to detect multiple faults in ROBDD based combinational circuits.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016
2015
PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Multiple stuck-at fault testability of a combinational circuit derived by covering ROBDD nodes by Invert-And-Or sub-circuits.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015