Tony Givargis

Orcid: 0000-0002-1608-9324

Affiliations:
  • University of California, Irvine, USA


According to our database1, Tony Givargis authored at least 110 papers between 1998 and 2024.

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Bibliography

2024
Hyperdimensional computing: a framework for stochastic computation and symbolic AI.
J. Big Data, December, 2024

Convolution and Cross-Correlation of Count Sketches Enables Fast Cardinality Estimation of Multi-Join Queries.
Proc. ACM Manag. Data, 2024

Always-Sparse Training by Growing Connections with Guided Stochastic Exploration.
CoRR, 2024

Molecular Classification Using Hyperdimensional Graph Classification.
Proceedings of the International Joint Conference on Neural Networks, 2024

Enhanced Detection of Transdermal Alcohol Levels Using Hyperdimensional Computing on Embedded Devices.
Proceedings of the International Joint Conference on Neural Networks, 2024

2023
Torchhd: An Open Source Python Library to Support Research on Hyperdimensional Computing and Vector Symbolic Architectures.
J. Mach. Learn. Res., 2023

HDCC: A Hyperdimensional Computing compiler for classification on embedded systems and high-performance computing.
CoRR, 2023

Accelerating Permute and N-Gram Operations for Hyperdimensional Learning in Embedded Systems.
Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023

DotHash: Estimating Set Similarity Metrics for Link Prediction and Document Deduplication.
Proceedings of the 29th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2023

Using Hyperdimensional Computing to Extract Features for the Detection of Type 2 Diabetes.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

RefineHD: Accurate and Efficient Single-Pass Adaptive Learning Using Hyperdimensional Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023

An Extension to Basis-Hypervectors for Learning from Circular Data in Hyperdimensional Computing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Torchhd: An Open-Source Python Library to Support Hyperdimensional Computing Research.
CoRR, 2022

GraphHD: Efficient graph classification using hyperdimensional computing.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Hyperdimensional hashing: a robust and efficient dynamic hash table.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Generation and Verification of Timing Attack Resilient Schedules During the High-Level Synthesis of Integrated Circuits.
Behavioral Synthesis for Hardware Security, 2022

2021
Detecting COVID-19 Related Pneumonia On CT Scans Using Hyperdimensional Computing.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

Class-Modeling of Septic Shock With Hyperdimensional Computing.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

Gravity: An Artificial Neural Network Compiler for Embedded Applications.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Pareto optimal design space exploration of cyber-physical systems.
Internet Things, 2020

2019
Switching Predictive Control Using Reconfigurable State-Based Model.
ACM Trans. Design Autom. Electr. Syst., 2019

2018
Priority Neuron: A Resource-Aware Neural Network for Cyber-Physical Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Enhanced Delta-tolling: Traffic Optimization via Policy Gradient Reinforcement Learning.
Proceedings of the 21st International Conference on Intelligent Transportation Systems, 2018

Enhanced Delta-tolling: Traffic Optimization via Policy Gradient Reinforcement Learning.
Proceedings of the International Symposium on Artificial Intelligence and Mathematics, 2018

Link-based Parameterized Micro-tolling Scheme for Optimal Traffic Management.
Proceedings of the 17th International Conference on Autonomous Agents and MultiAgent Systems, 2018

2017
Adaptive embedded control of cyber-physical systems using reinforcement learning.
IET Cyper-Phys. Syst.: Theory & Appl., 2017

Fine-grained acceleration control for autonomous intersection management using deep reinforcement learning.
Proceedings of the 2017 IEEE SmartWorld, 2017

OPEB: Open physical environment benchmark for artificial intelligence.
Proceedings of the 3rd IEEE International Forum on Research and Technologies for Society and Industry, 2017

Hybrid state machine model for fast model predictive control: Application to path tracking.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

HES machine: Harmonic equivalent state machine modeling for cyber-physical systems.
Proceedings of the 2017 IEEE International High Level Design Validation and Test Workshop, 2017

2016
Fuzzy logic based adaptive hierarchical scheduling for periodic real-time tasks.
SIGBED Rev., 2016

Design of Secure ECG-Based Biometric Authentication in Body Area Sensor Networks.
Sensors, 2016

Towards a timing attack aware high-level synthesis of integrated circuits.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015
Graph-Based Approaches to Placement of Processing Element Networks on FPGAs for Physical Model Simulation.
ACM Trans. Reconfigurable Technol. Syst., 2015

Component-Based Synthesis of Embedded Systems Using Satisfiability Modulo Theories.
ACM Trans. Design Autom. Electr. Syst., 2015

Improving Energy Efficiency and Thermal Comfort of Smart Buildings with HVAC Systems in the Presence of Sensor Faults.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

XGRID: A Scalable Many-Core Embedded Processor.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

From the browser to the remote physical lab: Programming cyber-physical systems.
Proceedings of the 2015 IEEE Frontiers in Education Conference, 2015

Including variability of physical models into the design automation of cyber-physical systems.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Adaptive resource synchronization in hierarchical real-time systems.
SIGBED Rev., 2014

A Survey on Concepts, Applications, and Challenges in Cyber-Physical Systems.
KSII Trans. Internet Inf. Syst., 2014

Resource Synchronization in Hierarchically Scheduled Real-Time Systems Using Preemptive Critical Sections.
Proceedings of the 17th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2014

2013
Synthesis of networks of custom processing elements for real-time physical system emulation.
ACM Trans. Design Autom. Electr. Syst., 2013

Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs.
ACM Trans. Embed. Comput. Syst., 2013

Embedding-based placement of processing element networks on FPGAs for physical model simulation.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Exploration with upgradeable models using statistical methods for physical model emulation.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Utilizing Intervals in Component-Based Design of Cyber Physical Systems.
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013

Modeling and Mitigation of Faults in Cyber-physical Systems with Binary Sensors.
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013

An efficient compression scheme for checkpointing of FPGA-based digital mockups.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Digital mockups for the testing of a medical ventilator.
Proceedings of the ACM International Health Informatics Symposium, 2012

RIOS: a lightweight task scheduler for embedded systems.
Proceedings of the Workshop on Embedded and Cyber-Physical Systems Education, 2012

MEDS: Mockup Electronic Data Sheets for automated testing of cyber-physical systems using digital mockups.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Synthesis of custom networks of heterogeneous processing elements for complex physical system emulation.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving.
IEEE Embed. Syst. Lett., 2011

2009
Virtual microcontrollers.
SIGBED Rev., 2009

Deterministic Service Guarantees for NAND Flash using Partial Block Cleaning.
J. Softw., 2009

Guest Editorial.
J. Softw., 2009

Optimizing control flow in loops using interval and dependence analysis.
Des. Autom. Embed. Syst., 2009

FlashBox: a system for logging non-deterministic events in deployed embedded systems.
Proceedings of the 2009 ACM Symposium on Applied Computing (SAC), 2009

Source Routing Made Practical in Embedded Networks.
Proceedings of the 18th International Conference on Computer Communications and Networks, 2009

FSAF: File system aware flash translation layer for NAND Flash Memories.
Proceedings of the Design, Automation and Test in Europe, 2009

Efficient dynamic voltage/frequency scaling through algorithmic loop transformation.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008
Guest Editor Introduction: Special Issue on Embedded Processors.
Int. J. Parallel Program., 2008

Real-Time Access Guarantees for NAND Flash Using Partial Block Cleaning.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2008

Highly-cited ideas in system codesign and synthesis.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

Control flow optimization in loops using interval analysis.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
Special Issue On Embedded Processors - Guest Editor Introduction.
Int. J. Parallel Program., 2007

Performance improvement of block based NAND flash translation layer.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Short-Circuit Compiler Transformation: Optimizing Conditional Blocks.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

System Architecture for Software Peripherals.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Expression equivalence checking using interval analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Synthesis of time-constrained multitasking embedded software.
ACM Trans. Design Autom. Electr. Syst., 2006

Zero cost indexing for improved processor cache performance.
ACM Trans. Design Autom. Electr. Syst., 2006

Localization of off-the-shelf mobile devices using audible sound: architectures, protocols and performance assessment.
ACM SIGMOBILE Mob. Comput. Commun. Rev., 2006

Phantom: a serializing compiler for multitasking embedded software.
Proceedings of the American Control Conference, 2006

2005
Memory reference caching for activity reduction on address buses.
Microprocess. Microsystems, 2005

Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler.
Proceedings of the 2005 Design, 2005

LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks.
Proceedings of the 2005 Design, 2005

Beep: 3D indoor positioning using audible sound.
Proceedings of the 2nd IEEE Consumer Communications and Networking Conference, 2005

Equivalence checking of arithmetic expressions using fast evaluation.
Proceedings of the 2005 International Conference on Compilers, 2005

2004
Cache optimization for embedded processor cores: An analytical approach.
ACM Trans. Design Autom. Electr. Syst., 2004

Code partitioning for synthesis of embedded applications with phantom.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Dynamic Voltage and Cache Reconfiguration for Low Power.
Proceedings of the 2004 Design, 2004

2003
Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores.
Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 2003

Analytical Design Space Exploration of Caches for Embedded Systems.
Proceedings of the 2003 Design, 2003

Improved indexing for cache miss reduction in embedded systems.
Proceedings of the 40th Design Automation Conference, 2003

2002
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores.
IEEE Trans. Very Large Scale Integr. Syst., 2002

System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Platune: a tuning framework for system-on-a-chip platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Power Estimator Development for Embedded System Memory Tuning.
J. Circuits Syst. Comput., 2002

Tuning of Cache Ways and Voltage for Low-Energy Embedded System Platforms.
Des. Autom. Embed. Syst., 2002

Multi-objective design space exploration using genetic algorithms.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

Embedded system design - a unified hardware / software introduction.
Wiley-VCH, ISBN: 978-0-471-45303-1, 2002

2001
Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Platform Tuning for Embedded Systems Design.
Computer, 2001

System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Trace-driven system-level power evaluation of system-on-a-chip peripheral cores.
Proceedings of ASP-DAC 2001, 2001

2000
Real-time differential carrier phase GPS-aided INS.
IEEE Trans. Control. Syst. Technol., 2000

Differential GPS reference station algorithm-design and analysis.
IEEE Trans. Control. Syst. Technol., 2000

Experiments with the Peripheral Virtual Component Interface.
Proceedings of the 13th International Symposium on System Synthesis, 2000

Techniques for Reducing Read Latency of Core Bus Wrappers.
Proceedings of the 2000 Design, 2000

Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design.
Proceedings of the 2000 Design, 2000

Parameterized system design.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

A first-step towards an architecture tuning methodology for low power.
Proceedings of the 2000 International Conference on Compilers, 2000

A hybrid approach for core-based system-level power modeling.
Proceedings of ASP-DAC 2000, 2000

1999
Pre-Fetching for Improved Core Interfacing.
Proceedings of the 12th International Symposium on System Synthesis, 1999

Interface and cache power exploration for core-based embedded system design.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

The case for a configure-and-execute paradigm.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1998
Incorporating Cores into System-Level Specification.
Proceedings of the 11th International Symposium on System Synthesis, 1998

Interface Exploration for Reduced Power in Core-Based Systems.
Proceedings of the 11th International Symposium on System Synthesis, 1998


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