Toni Juan

According to our database, Toni Juan authored at least 13 papers between 1994 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Architecting a hardware-managed hybrid DIMM optimized for cost/performance.

Frederick A. Ware, Javier Bueno, Liji Gopalakrishnan, Brent Haukness, Chris Haywood, Toni Juan, Eric Linstadt, Sally A. McKee, Steven C. Woo, Kenneth L. Wright, Craig Hampel, Gary Bronner

Proceedings of the International Symposium on Memory Systems, 2018

2009

Larrabee: A Many-Core x86 Architecture for Visual Computing.

Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Pradeep Dubey, Stephen Junkins, Adam T. Lake, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Michael Abrash, Jeremy Sugerman, Pat Hanrahan

IEEE Micro, 2009

Reusing cached schedules in an out-of-order processor with in-order issue logic.

Oscar Palomar, Toni Juan, Juan J. Navarro

Proceedings of the 27th International Conference on Computer Design, 2009

2002

Asim: A Performance Model Framework.

Joel S. Emer, Pritpal S. Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan

Computer, 2002

Tarantula: A Vector Extension to the Alpha Architecture.

Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, André Seznec

Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

2001

How to compare the performance of two SMT microarchitectures.

Yiannakis Sazeides, Toni Juan

Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

1998

Dataflow Analysis of Branch Mispredictions and Its Application to Early Resolution of Branch Outcomes.

Alexandre Farcy, Olivier Temam, Roger Espasa, Toni Juan

Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998

Dynamic History-length Fitting: A Third Level of Adaptivity for Branch Prediction.

Toni Juan, Sanji Sanjeevan, Juan J. Navarro

Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

1997

Reducing TLB power requirements.

Toni Juan, Tomás Lang, Juan J. Navarro

Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

Data Caches for Superscalar Processors.

Toni Juan, Juan J. Navarro, Olivier Temam

Proceedings of the 11th international conference on Supercomputing, 1997

1996

The Difference-bit Cache.

Toni Juan, Tomás Lang, Juan J. Navarro

Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

Block Algorithms for Sparse Matrix Computations on High Performance Workstations.

Juan J. Navarro, Elena García-Diego, Josep Lluís Larriba-Pey, Toni Juan

Proceedings of the 10th international conference on Supercomputing, 1996

1994

MOB forms: a class of multilevel block algorithms for dense linear algebra operations.

Juan J. Navarro, Toni Juan, Tomás Lang

Proceedings of the 8th international conference on Supercomputing, 1994