Tong Liu

Affiliations:
  • Actel Corp., Sunnyvale, CA, USA
  • Texas A&M University, College Station, TX, USA (former)


According to our database1, Tong Liu authored at least 8 papers between 1994 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2000
Testing and testable designs for one-time programmable FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1999
Test generation and scheduling for layout-based detection of bridge faults in interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 1999

1996
Layout-driven detection of bridge faults in interconnects.
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

1995
Diagnosis of interconnects using a structured walking-1 approach.
Integr., 1995

Diagnosis of interconnects and FPICs using a structured walking-1 approach.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

A Submesh Allocation Scheme for Mesh-Connected Multiprocessor Systems.
Proceedings of the 1995 International Conference on Parallel Processing, 1995

Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays.
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

1994
On Soft Switch Programming for Reconfigurable Array Systems.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994


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