Tong-Chern Ong
According to our database1,
Tong-Chern Ong
authored at least 7 papers
between 2002 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2020
A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2018
Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2005
A new pre-driver design for improving the ESD performance of the high voltage tolerant I/O.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2003
Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era.
IEEE J. Solid State Circuits, 2003
2002
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002