Ton J. Mouthaan

According to our database1, Ton J. Mouthaan authored at least 16 papers between 1994 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
Editorial.
Microelectron. Reliab., 2008

CreaTe: A New Programme to Attract Engineers as Design Artists.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2006
Internationalisation of Masters education; globalisation at work.
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

2005
A 3-D Circuit Model to evaluate CDM performance of ICs.
Microelectron. Reliab., 2005

2004
A Case Study of a Microsystems MSc Curriculum.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2003
Role of package parasitics and substrate resistance on the Charged Device Model (CDM) failure levels -An explanation and die protection strategy.
Microelectron. Reliab., 2003

Competence-Based EE-Learning: (How) Can We Implement It?
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

2002
The influence of technology variation on ggNMOSTs and SCRs against CDM BSD stress.
Microelectron. Reliab., 2002

Simulation and experimental characterization of reservoir and via layout effects on electromigration lifetime.
Microelectron. Reliab., 2002

Fast temperature cycling and electromigration induced thin film cracking in multilevel interconnection: experiments and modeling.
Microelectron. Reliab., 2002

Zapping thin film transistors.
Microelectron. Reliab., 2002

Competencies of BSc and MSc Programmes in Electrical Engineering and Student Portfolios.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2001
The time-voltage trade-off for ESD damage threshold in amorphous silicon hydrogenated thin-film transistors.
Microelectron. Reliab., 2001

Investigations on double-diffused MOS transistors under ESD zap conditions.
Microelectron. Reliab., 2001

1996
Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1994
Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994


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