Tomoya Saito
According to our database1,
Tomoya Saito
authored at least 9 papers
between 2000 and 2024.
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Bibliography
2024
A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C.
IEEE J. Solid State Circuits, April, 2024
15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2022
A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2018
Proceedings of the Embedded Flash Memory for Embedded Systems: Technology, 2018
2016
A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C.
IEEE J. Solid State Circuits, 2016
2013
Fast algorithms for finding a minimum repetition representation of strings and trees.
Discret. Appl. Math., 2013
2010
Proceedings of the String Processing and Information Retrieval, 2010
2008
Flexible Framework for Time-Series Pattern Matching over Multi-dimension Data Stream.
Proceedings of the New Frontiers in Applied Data Mining, 2008
2000
Effect of imbalance in activities between ON- and OFF-center LGN cells on orientation map formation.
Biol. Cybern., 2000