Tomoaki Hasegawa

According to our database1, Tomoaki Hasegawa authored at least 3 papers between 2005 and 2006.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Evaluation of Multiple-Valued Packet Multiplexing Scheme for Network-on-Chip Architecture.
Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006

2005
Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic.
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer.
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005


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