Tommaso Zanotti
Orcid: 0000-0002-4145-8830
According to our database1,
Tommaso Zanotti
authored at least 8 papers
between 2019 and 2022.
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Bibliography
2022
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing.
CoRR, 2022
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
2021
Optimized Synthesis Method for Ultra-Low Power Multi-Input Material Implication Logic With Emerging Non-Volatile Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive Memories.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
2020
Reconfigurable Smart In-Memory Computing Platform Supporting Logic and Binarized Neural Networks for Low-Power Edge Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph Noise.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
SIMPLY: Design of a RRAM-Based Smart Logic-in-Memory Architecture using RRAM Compact Model.
Proceedings of the 49th European Solid-State Device Research Conference, 2019