Tommaso Marinelli

Orcid: 0000-0002-8555-3581

According to our database1, Tommaso Marinelli authored at least 5 papers between 2020 and 2024.

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Bibliography

2024
Full-stack evaluation of Machine Learning inference workloads for RISC-V systems.
CoRR, 2024

2023
COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications.
J. Syst. Archit., December, 2023

2022
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices.
ACM Trans. Embed. Comput. Syst., 2022

Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2020
The gem5 Simulator: Version 20.0+.
CoRR, 2020


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